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1.08
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Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:
- m -
MACHINE_SPECIFIC_REG :
StmResourceDescriptor.h
ManagementDeviceAddressTypeIOPort :
SmBios.h
ManagementDeviceAddressTypeMemory :
SmBios.h
ManagementDeviceAddressTypeOther :
SmBios.h
ManagementDeviceAddressTypeSmbus :
SmBios.h
ManagementDeviceAddressTypeUnknown :
SmBios.h
ManagementDeviceTypeAdm9240 :
SmBios.h
ManagementDeviceTypeDs1780 :
SmBios.h
ManagementDeviceTypeGl518Sm :
SmBios.h
ManagementDeviceTypeHt82H791 :
SmBios.h
ManagementDeviceTypeLm75 :
SmBios.h
ManagementDeviceTypeLm78 :
SmBios.h
ManagementDeviceTypeLm79 :
SmBios.h
ManagementDeviceTypeLm80 :
SmBios.h
ManagementDeviceTypeLm81 :
SmBios.h
ManagementDeviceTypeMaxim1617 :
SmBios.h
ManagementDeviceTypeOther :
SmBios.h
ManagementDeviceTypeUnknown :
SmBios.h
ManagementDeviceTypeW83781D :
SmBios.h
MarkParity :
SerialIo.h
Mask :
Acpi10.h
MathProcessor :
SmBios.h
MAX :
Base.h
MAX_2_BITS :
ProcessorBind.h
MAX_AARCH64_EXCEPTION :
DebugSupport.h
MAX_ACTIVE_SESSIONS :
Tpm20.h
MAX_ADDRESS :
ProcessorBind.h
MAX_AES_BLOCK_SIZE_BYTES :
Tpm20.h
MAX_AES_KEY_BITS :
Tpm20.h
MAX_AES_KEY_BYTES :
Tpm20.h
MAX_ALG_LIST_SIZE :
Tpm20.h
MAX_ALLOC_ADDRESS :
ProcessorBind.h
MAX_ARM_EXCEPTION :
DebugSupport.h
MAX_BIT :
ProcessorBind.h
MAX_CAP_ALGS :
Tpm20.h
MAX_CAP_BUFFER :
Tpm20.h
MAX_CAP_CC :
Tpm20.h
MAX_CAP_DATA :
Tpm20.h
MAX_CAP_HANDLES :
Tpm20.h
MAX_COMMAND_SIZE :
Tpm20.h
MAX_CONTEXT_SIZE :
Tpm20.h
MAX_DESC_TYPE :
StmResourceDescriptor.h
MAX_DIGEST_BUFFER :
Tpm20.h
MAX_EBC_EXCEPTION :
DebugSupport.h
MAX_ECC_CURVES :
Tpm20.h
MAX_ECC_KEY_BITS :
Tpm20.h
MAX_ECC_KEY_BYTES :
Tpm20.h
MAX_EEPROM_LEN :
UefiPxe.h
MAX_HANDLE_NUM :
Tpm20.h
MAX_INT16 :
Base.h
MAX_INT32 :
Base.h
MAX_INT64 :
Base.h
MAX_INT8 :
Base.h
MAX_INTN :
ProcessorBind.h
MAX_LOADED_OBJECTS :
Tpm20.h
MAX_LOADED_SESSIONS :
Tpm20.h
MAX_MBR_PARTITIONS :
Mbr.h
MAX_MCAST_ADDRESS_CNT :
UefiPxe.h
MAX_MCAST_FILTER_CNT :
SimpleNetwork.h
MAX_NV_INDEX_SIZE :
Tpm20.h
MAX_ORDERLY_COUNT :
Tpm20.h
MAX_PCI_CONFIG_LEN :
UefiPxe.h
MAX_PCR_INDEX :
TrEEProtocol.h
,
Tcg2Protocol.h
MAX_PCR_PROPERTIES :
Tpm20.h
MAX_PEERID_LEN :
IpSecConfig.h
MAX_RESPONSE_SIZE :
Tpm20.h
MAX_RNG_ENTROPY_SIZE :
Tpm20.h
MAX_RSA_KEY_BITS :
Tpm20.h
MAX_RSA_KEY_BYTES :
Tpm20.h
MAX_SESSION_NUM :
Tpm20.h
MAX_SESSION_NUMBER :
Tpm20.h
MAX_SM4_BLOCK_SIZE_BYTES :
Tpm20.h
MAX_SM4_KEY_BITS :
Tpm20.h
MAX_SM4_KEY_BYTES :
Tpm20.h
MAX_START_FIELD_VALID :
EapManagement.h
MAX_SYM_BLOCK_SIZE :
Tpm20.h
MAX_SYM_DATA :
Tpm20.h
MAX_SYM_KEY_BITS :
Tpm20.h
MAX_SYM_KEY_BYTES :
Tpm20.h
MAX_TLS_SESSION_ID_LENGTH :
Tls.h
MAX_TPM_PROPERTIES :
Tpm20.h
MAX_UINT16 :
Base.h
MAX_UINT32 :
Base.h
MAX_UINT64 :
Base.h
MAX_UINT8 :
Base.h
MAX_UINTN :
ProcessorBind.h
MAX_XMIT_BUFFERS :
UefiPxe.h
MAX_XMIT_FRAGMENTS :
UefiPxe.h
MaxAllocateType :
UefiSpec.h
MaxDeviceType :
BlockIo.h
MAXIMUM_VALUE_CHARACTERS :
PrintLib.h
MaximumChipsetPhase :
PciPlatform.h
MaxPacketSize :
UsbFunctionIo.h
MaxSupplicantPaeState :
EapManagement.h
MaxTransferLength :
NvdimmLabel.h
MaxTransferSize :
UsbFunctionIo.h
MBR_SIGNATURE :
Mbr.h
MBR_SIZE :
Mbr.h
MBR_TYPE_EFI_PARTITION_TABLE_HEADER :
DevicePath.h
MBR_TYPE_PCAT :
DevicePath.h
MC_HOST_INTERFACE_PROTOCOL_TYPE :
SmBios.h
MC_HOST_INTERFACE_TYPE :
SmBios.h
MCHostInterfaceProtocolTypeIPMI :
SmBios.h
MCHostInterfaceProtocolTypeMCTP :
SmBios.h
MCHostInterfaceProtocolTypeOemDefined :
SmBios.h
MCHostInterfaceProtocolTypeRedfishOverIP :
SmBios.h
MCHostInterfaceTypeNetworkHostInterface :
SmBios.h
MCHostInterfaceTypeOemDefined :
SmBios.h
MDE_CPU_AARCH64 :
ProcessorBind.h
MDE_CPU_ARM :
ProcessorBind.h
MDE_CPU_EBC :
ProcessorBind.h
MDE_CPU_IA32 :
ProcessorBind.h
MDE_CPU_RISCV64 :
ProcessorBind.h
MDE_CPU_X64 :
ProcessorBind.h
MDEPKG_TOKEN_SPACE_GUID :
MdePkgTokenSpace.h
MEDIA_CDROM_DP :
DevicePath.h
MEDIA_DEVICE_PATH :
DevicePath.h
MEDIA_FILEPATH_DP :
DevicePath.h
MEDIA_HARDDRIVE_DP :
DevicePath.h
MEDIA_PIWG_FW_FILE_DP :
DevicePath.h
MEDIA_PIWG_FW_VOL_DP :
DevicePath.h
MEDIA_PROTOCOL_DP :
DevicePath.h
MEDIA_RAM_DISK_DP :
DevicePath.h
MEDIA_RELATIVE_OFFSET_RANGE_DP :
DevicePath.h
MEDIA_VENDOR_DP :
DevicePath.h
MediaId :
BlockIoCrypto.h
,
StorageSecurityCommand.h
,
EraseBlock.h
,
DiskIo2.h
,
BlockIo2.h
MEM_RANGE :
StmResourceDescriptor.h
Memory :
PiPeiCis.h
MEMORY_ARRAY_LOCATION :
SmBios.h
MEMORY_ARRAY_USE :
SmBios.h
MEMORY_CHANNEL_TYPE :
SmBios.h
MEMORY_DEVICE_TECHNOLOGY :
SmBios.h
MEMORY_DEVICE_TYPE :
SmBios.h
MEMORY_ERROR_CORRECTION :
SmBios.h
MEMORY_ERROR_DETECT_METHOD :
SmBios.h
MEMORY_ERROR_GRANULARITY :
SmBios.h
MEMORY_ERROR_OPERATION :
SmBios.h
MEMORY_ERROR_TYPE :
SmBios.h
MEMORY_FORM_FACTOR :
SmBios.h
MEMORY_ONLY_RESET_CONTROL_GUID :
MemoryOverwriteControl.h
MEMORY_OVERWRITE_REQUEST_CONTROL_LOCK_GUID :
MemoryOverwriteRequestControlLock.h
MEMORY_OVERWRITE_REQUEST_CONTROL_LOCK_NAME :
MemoryOverwriteRequestControlLock.h
MEMORY_OVERWRITE_REQUEST_VARIABLE_NAME :
MemoryOverwriteControl.h
MEMORY_SUPPORT_INTERLEAVE_TYPE :
SmBios.h
MemoryArrayLocationCXLAddonCard :
SmBios.h
MemoryArrayLocationEisaAddonCard :
SmBios.h
MemoryArrayLocationIsaAddonCard :
SmBios.h
MemoryArrayLocationMcaAddonCard :
SmBios.h
MemoryArrayLocationNuBus :
SmBios.h
MemoryArrayLocationOther :
SmBios.h
MemoryArrayLocationPc98C20AddonCard :
SmBios.h
MemoryArrayLocationPc98C24AddonCard :
SmBios.h
MemoryArrayLocationPc98EAddonCard :
SmBios.h
MemoryArrayLocationPc98LocalBusAddonCard :
SmBios.h
MemoryArrayLocationPciAddonCard :
SmBios.h
MemoryArrayLocationPcmciaAddonCard :
SmBios.h
MemoryArrayLocationProprietaryAddonCard :
SmBios.h
MemoryArrayLocationSystemBoard :
SmBios.h
MemoryArrayLocationUnknown :
SmBios.h
MemoryArrayUseCacheMemory :
SmBios.h
MemoryArrayUseFlashMemory :
SmBios.h
MemoryArrayUseNonVolatileRam :
SmBios.h
MemoryArrayUseOther :
SmBios.h
MemoryArrayUseSystemMemory :
SmBios.h
MemoryArrayUseUnknown :
SmBios.h
MemoryArrayUseVideoMemory :
SmBios.h
MemoryChannelTypeOther :
SmBios.h
MemoryChannelTypeRambus :
SmBios.h
MemoryChannelTypeSyncLink :
SmBios.h
MemoryChannelTypeUnknown :
SmBios.h
MemoryErrorBadRead :
SmBios.h
MemoryErrorChecksum :
SmBios.h
MemoryErrorCorrected :
SmBios.h
MemoryErrorCorrectionCrc :
SmBios.h
MemoryErrorCorrectionMultiBitEcc :
SmBios.h
MemoryErrorCorrectionNone :
SmBios.h
MemoryErrorCorrectionOther :
SmBios.h
MemoryErrorCorrectionParity :
SmBios.h
MemoryErrorCorrectionSingleBitEcc :
SmBios.h
MemoryErrorCorrectionUnknown :
SmBios.h
MemoryErrorCorrectSingleBit :
SmBios.h
MemoryErrorCrc :
SmBios.h
MemoryErrorDoubleBit :
SmBios.h
MemoryErrorMultiBit :
SmBios.h
MemoryErrorNibble :
SmBios.h
MemoryErrorOk :
SmBios.h
MemoryErrorOperationOther :
SmBios.h
MemoryErrorOperationPartialWrite :
SmBios.h
MemoryErrorOperationRead :
SmBios.h
MemoryErrorOperationUnknown :
SmBios.h
MemoryErrorOperationWrite :
SmBios.h
MemoryErrorOther :
SmBios.h
MemoryErrorParity :
SmBios.h
MemoryErrorSigleBit :
SmBios.h
MemoryErrorUnCorrectable :
SmBios.h
MemoryErrorUnknown :
SmBios.h
MemoryFence() :
BaseLib.h
MemoryFormFactorChip :
SmBios.h
MemoryFormFactorDie :
SmBios.h
MemoryFormFactorDimm :
SmBios.h
MemoryFormFactorDip :
SmBios.h
MemoryFormFactorFbDimm :
SmBios.h
MemoryFormFactorOther :
SmBios.h
MemoryFormFactorProprietaryCard :
SmBios.h
MemoryFormFactorRimm :
SmBios.h
MemoryFormFactorRowOfChips :
SmBios.h
MemoryFormFactorSimm :
SmBios.h
MemoryFormFactorSip :
SmBios.h
MemoryFormFactorSodimm :
SmBios.h
MemoryFormFactorSrimm :
SmBios.h
MemoryFormFactorTsop :
SmBios.h
MemoryFormFactorUnknown :
SmBios.h
MemoryFormFactorZip :
SmBios.h
MemoryGranularityDeviceLevel :
SmBios.h
MemoryGranularityMemPartitionLevel :
SmBios.h
MemoryGranularityOther :
SmBios.h
MemoryGranularityOtherUnknown :
SmBios.h
MemoryInterleaveEightWay :
SmBios.h
MemoryInterleaveFourWay :
SmBios.h
MemoryInterleaveOneWay :
SmBios.h
MemoryInterleaveOther :
SmBios.h
MemoryInterleaveSixteenWay :
SmBios.h
MemoryInterleaveTwoWay :
SmBios.h
MemoryInterleaveUnknown :
SmBios.h
MemoryTechnologyDram :
SmBios.h
MemoryTechnologyIntelOptanePersistentMemory :
SmBios.h
MemoryTechnologyNvdimmF :
SmBios.h
MemoryTechnologyNvdimmN :
SmBios.h
MemoryTechnologyNvdimmP :
SmBios.h
MemoryTechnologyOther :
SmBios.h
MemoryTechnologyUnknown :
SmBios.h
MemoryType3Dram :
SmBios.h
MemoryTypeCdram :
SmBios.h
MemoryTypeDdr :
SmBios.h
MemoryTypeDdr2 :
SmBios.h
MemoryTypeDdr2FbDimm :
SmBios.h
MemoryTypeDdr3 :
SmBios.h
MemoryTypeDdr4 :
SmBios.h
MemoryTypeDdr5 :
SmBios.h
MemoryTypeDram :
SmBios.h
MemoryTypeEdram :
SmBios.h
MemoryTypeEeprom :
SmBios.h
MemoryTypeEprom :
SmBios.h
MemoryTypeFbd2 :
SmBios.h
MemoryTypeFeprom :
SmBios.h
MemoryTypeFlash :
SmBios.h
MemoryTypeHBM :
SmBios.h
MemoryTypeHBM2 :
SmBios.h
MemoryTypeLogicalNonVolatileDevice :
SmBios.h
MemoryTypeLpddr :
SmBios.h
MemoryTypeLpddr2 :
SmBios.h
MemoryTypeLpddr3 :
SmBios.h
MemoryTypeLpddr4 :
SmBios.h
MemoryTypeLpddr5 :
SmBios.h
MemoryTypeOther :
SmBios.h
MemoryTypeRam :
SmBios.h
MemoryTypeRdram :
SmBios.h
MemoryTypeRom :
SmBios.h
MemoryTypeSdram :
SmBios.h
MemoryTypeSgram :
SmBios.h
MemoryTypeSram :
SmBios.h
MemoryTypeUnknown :
SmBios.h
MemoryTypeVram :
SmBios.h
Message :
UsbFunctionIo.h
,
HiiPopup.h
MESSAGING_DEVICE_PATH :
DevicePath.h
MFI_SCSI_IO_TYPE_A :
ScsiIo.h
MFI_SCSI_IO_TYPE_B :
ScsiIo.h
MFI_SCSI_IO_TYPE_BRIDGE :
ScsiIo.h
MFI_SCSI_IO_TYPE_OCRW :
ScsiIo.h
MFI_SCSI_IO_TYPE_OSD :
ScsiIo.h
MFI_SCSI_IO_TYPE_RAID :
ScsiIo.h
MFI_SCSI_IO_TYPE_RBC :
ScsiIo.h
MFI_SCSI_IO_TYPE_SES :
ScsiIo.h
MHz :
SpiConfiguration.h
MicroSecondDelay() :
TimerLib.h
migratable :
Tpm12.h
migrateAuthority :
Tpm12.h
MigratePeiServicesTablePointer() :
PeiServicesTablePointerLib.h
MIN :
Base.h
MIN_EVICT_OBJECTS :
Tpm20.h
MIN_INT16 :
Base.h
MIN_INT32 :
Base.h
MIN_INT64 :
Base.h
MIN_INT8 :
Base.h
MIN_INTN :
ProcessorBind.h
MISC_BOOT_INFORMATION_STATUS_DATA_TYPE :
SmBios.h
MISC_CHASSIS_SECURITY_STATE :
SmBios.h
MISC_CHASSIS_STATE :
SmBios.h
MISC_CHASSIS_TYPE :
SmBios.h
MISC_MANAGEMENT_DEVICE_ADDRESS_TYPE :
SmBios.h
MISC_MANAGEMENT_DEVICE_TYPE :
SmBios.h
MISC_ONBOARD_DEVICE_TYPE :
SmBios.h
MISC_PORT_CONNECTOR_TYPE :
SmBios.h
MISC_PORT_TYPE :
SmBios.h
MISC_SLOT_DATA_BUS_WIDTH :
SmBios.h
MISC_SLOT_LENGTH :
SmBios.h
MISC_SLOT_TYPE :
SmBios.h
MISC_SLOT_USAGE :
SmBios.h
MISC_SYSTEM_WAKEUP_TYPE :
SmBios.h
MiscChassisAdvancedTCA :
SmBios.h
MiscChassisBlade :
SmBios.h
MiscChassisBladeEnclosure :
SmBios.h
MiscChassisCompactPCI :
SmBios.h
MiscChassisConvertible :
SmBios.h
MiscChassisDetachable :
SmBios.h
MiscChassisEmbeddedPc :
SmBios.h
MiscChassisIoTGateway :
SmBios.h
MiscChassisMiniPc :
SmBios.h
MiscChassisMultiSystemChassis :
SmBios.h
MiscChassisStickPc :
SmBios.h
MiscChassisTablet :
SmBios.h
MiscChassisTypeAllInOne :
SmBios.h
MiscChassisTypeBusExpansionChassis :
SmBios.h
MiscChassisTypeDeskTop :
SmBios.h
MiscChassisTypeDockingStation :
SmBios.h
MiscChassisTypeExpansionChassis :
SmBios.h
MiscChassisTypeHandHeld :
SmBios.h
MiscChassisTypeLapTop :
SmBios.h
MiscChassisTypeLowProfileDesktop :
SmBios.h
MiscChassisTypeLunchBox :
SmBios.h
MiscChassisTypeMainServerChassis :
SmBios.h
MiscChassisTypeMiniTower :
SmBios.h
MiscChassisTypeNotebook :
SmBios.h
MiscChassisTypeOther :
SmBios.h
MiscChassisTypePeripheralChassis :
SmBios.h
MiscChassisTypePizzaBox :
SmBios.h
MiscChassisTypePortable :
SmBios.h
MiscChassisTypeRackMountChassis :
SmBios.h
MiscChassisTypeRaidChassis :
SmBios.h
MiscChassisTypeSealedCasePc :
SmBios.h
MiscChassisTypeSpaceSaving :
SmBios.h
MiscChassisTypeSubChassis :
SmBios.h
MiscChassisTypeSubNotebook :
SmBios.h
MiscChassisTypeTower :
SmBios.h
MiscChassisTypeUnknown :
SmBios.h
MM_COMPLETION :
MmMp.h
MM_IO_UINT16 :
MmCpuIo.h
MM_IO_UINT32 :
MmCpuIo.h
MM_IO_UINT64 :
MmCpuIo.h
MM_IO_UINT8 :
MmCpuIo.h
MM_MMST_SIGNATURE :
PiMmCis.h
MM_SPECIFICATION_MAJOR_REVISION :
PiMmCis.h
MM_SPECIFICATION_MINOR_REVISION :
PiMmCis.h
MmEntryPoint :
MmConfiguration.h
MMIO_COPY_UINT16 :
DeviceIo.h
MMIO_COPY_UINT32 :
DeviceIo.h
MMIO_COPY_UINT64 :
DeviceIo.h
MMIO_COPY_UINT8 :
DeviceIo.h
MMIO_RANGE :
StmResourceDescriptor.h
MmioAnd16() :
IoLib.h
MmioAnd32() :
IoLib.h
MmioAnd64() :
IoLib.h
MmioAnd8() :
IoLib.h
MmioAndThenOr16() :
IoLib.h
MmioAndThenOr32() :
IoLib.h
MmioAndThenOr64() :
IoLib.h
MmioAndThenOr8() :
IoLib.h
MmioBitFieldAnd16() :
IoLib.h
MmioBitFieldAnd32() :
IoLib.h
MmioBitFieldAnd64() :
IoLib.h
MmioBitFieldAnd8() :
IoLib.h
MmioBitFieldAndThenOr16() :
IoLib.h
MmioBitFieldAndThenOr32() :
IoLib.h
MmioBitFieldAndThenOr64() :
IoLib.h
MmioBitFieldAndThenOr8() :
IoLib.h
MmioBitFieldOr16() :
IoLib.h
MmioBitFieldOr32() :
IoLib.h
MmioBitFieldOr64() :
IoLib.h
MmioBitFieldOr8() :
IoLib.h
MmioBitFieldRead16() :
IoLib.h
MmioBitFieldRead32() :
IoLib.h
MmioBitFieldRead64() :
IoLib.h
MmioBitFieldRead8() :
IoLib.h
MmioBitFieldWrite16() :
IoLib.h
MmioBitFieldWrite32() :
IoLib.h
MmioBitFieldWrite64() :
IoLib.h
MmioBitFieldWrite8() :
IoLib.h
MmioOr16() :
IoLib.h
MmioOr32() :
IoLib.h
MmioOr64() :
IoLib.h
MmioOr8() :
IoLib.h
MmioRead16() :
IoLib.h
MmioRead32() :
IoLib.h
MmioRead64() :
IoLib.h
MmioRead8() :
IoLib.h
MmioReadBuffer16() :
IoLib.h
MmioReadBuffer32() :
IoLib.h
MmioReadBuffer64() :
IoLib.h
MmioReadBuffer8() :
IoLib.h
MmioWrite16() :
IoLib.h
MmioWrite32() :
IoLib.h
MmioWrite64() :
IoLib.h
MmioWrite8() :
IoLib.h
MmioWriteBuffer16() :
IoLib.h
MmioWriteBuffer32() :
IoLib.h
MmioWriteBuffer64() :
IoLib.h
MmioWriteBuffer8() :
IoLib.h
MmUnblockMemoryRequest() :
MmUnblockMemoryLib.h
ModU64x32() :
BaseLib.h
MODULE_DB_END_ID :
PerformanceLib.h
MODULE_DB_START_ID :
PerformanceLib.h
MODULE_DB_STOP_END_ID :
PerformanceLib.h
MODULE_DB_STOP_START_ID :
PerformanceLib.h
MODULE_DB_SUPPORT_END_ID :
PerformanceLib.h
MODULE_DB_SUPPORT_START_ID :
PerformanceLib.h
MODULE_END_ID :
PerformanceLib.h
MODULE_LOADIMAGE_END_ID :
PerformanceLib.h
MODULE_LOADIMAGE_START_ID :
PerformanceLib.h
MODULE_START_ID :
PerformanceLib.h
MOR_CLEAR_MEMORY_BIT_MASK :
MemoryOverwriteControl.h
MOR_CLEAR_MEMORY_BIT_OFFSET :
MemoryOverwriteControl.h
MOR_CLEAR_MEMORY_VALUE :
MemoryOverwriteControl.h
MOR_DISABLE_AUTO_DETECT_VALUE :
MemoryOverwriteControl.h
MOR_DISABLEAUTODETECT_BIT_MASK :
MemoryOverwriteControl.h
MOR_DISABLEAUTODETECT_BIT_OFFSET :
MemoryOverwriteControl.h
MOVI_DATAWIDTH16 :
Ebc.h
MOVI_DATAWIDTH32 :
Ebc.h
MOVI_DATAWIDTH64 :
Ebc.h
MOVI_M_DATAWIDTH :
Ebc.h
MOVI_M_IMMDATA :
Ebc.h
MOVI_M_MOVEWIDTH :
Ebc.h
MOVI_MOVEWIDTH16 :
Ebc.h
MOVI_MOVEWIDTH32 :
Ebc.h
MOVI_MOVEWIDTH64 :
Ebc.h
MOVI_MOVEWIDTH8 :
Ebc.h
MPS_TABLE_GUID :
Mps.h
MSG_1394_DP :
DevicePath.h
MSG_ATAPI_DP :
DevicePath.h
MSG_BLUETOOTH_DP :
DevicePath.h
MSG_BLUETOOTH_LE_DP :
DevicePath.h
MSG_DEVICE_LOGICAL_UNIT_DP :
DevicePath.h
MSG_DNS_DP :
DevicePath.h
MSG_EMMC_DP :
DevicePath.h
MSG_FIBRECHANNEL_DP :
DevicePath.h
MSG_FIBRECHANNELEX_DP :
DevicePath.h
MSG_I2O_DP :
DevicePath.h
MSG_INFINIBAND_DP :
DevicePath.h
MSG_IPv4_DP :
DevicePath.h
MSG_IPv6_DP :
DevicePath.h
MSG_ISCSI_DP :
DevicePath.h
MSG_MAC_ADDR_DP :
DevicePath.h
MSG_NVME_NAMESPACE_DP :
DevicePath.h
MSG_SASEX_DP :
DevicePath.h
MSG_SATA_DP :
DevicePath.h
MSG_SCSI_DP :
DevicePath.h
MSG_SD_DP :
DevicePath.h
MSG_UART_DP :
DevicePath.h
MSG_UFS_DP :
DevicePath.h
MSG_URI_DP :
DevicePath.h
MSG_USB_CLASS_DP :
DevicePath.h
MSG_USB_DP :
DevicePath.h
MSG_USB_WWID_DP :
DevicePath.h
MSG_VENDOR_DP :
DevicePath.h
MSG_VLAN_DP :
DevicePath.h
MSG_WIFI_DP :
DevicePath.h
Msk :
EapManagement2.h
MskSize :
EapManagement2.h
MSR_ATOM_BBL_CR_CTL3 :
AtomMsr.h
MSR_ATOM_EBL_CR_POWERON :
AtomMsr.h
MSR_ATOM_FSB_FREQ :
AtomMsr.h
MSR_ATOM_IA32_MISC_ENABLE :
AtomMsr.h
MSR_ATOM_LASTBRANCH_0_FROM_IP :
AtomMsr.h
MSR_ATOM_LASTBRANCH_0_TO_IP :
AtomMsr.h
MSR_ATOM_LASTBRANCH_1_FROM_IP :
AtomMsr.h
MSR_ATOM_LASTBRANCH_1_TO_IP :
AtomMsr.h
MSR_ATOM_LASTBRANCH_2_FROM_IP :
AtomMsr.h
MSR_ATOM_LASTBRANCH_2_TO_IP :
AtomMsr.h
MSR_ATOM_LASTBRANCH_3_FROM_IP :
AtomMsr.h
MSR_ATOM_LASTBRANCH_3_TO_IP :
AtomMsr.h
MSR_ATOM_LASTBRANCH_4_FROM_IP :
AtomMsr.h
MSR_ATOM_LASTBRANCH_4_TO_IP :
AtomMsr.h
MSR_ATOM_LASTBRANCH_5_FROM_IP :
AtomMsr.h
MSR_ATOM_LASTBRANCH_5_TO_IP :
AtomMsr.h
MSR_ATOM_LASTBRANCH_6_FROM_IP :
AtomMsr.h
MSR_ATOM_LASTBRANCH_6_TO_IP :
AtomMsr.h
MSR_ATOM_LASTBRANCH_7_FROM_IP :
AtomMsr.h
MSR_ATOM_LASTBRANCH_7_TO_IP :
AtomMsr.h
MSR_ATOM_LASTBRANCH_TOS :
AtomMsr.h
MSR_ATOM_LER_FROM_LIP :
AtomMsr.h
MSR_ATOM_LER_TO_LIP :
AtomMsr.h
MSR_ATOM_PEBS_ENABLE :
AtomMsr.h
MSR_ATOM_PERF_STATUS :
AtomMsr.h
MSR_ATOM_PKG_C2_RESIDENCY :
AtomMsr.h
MSR_ATOM_PKG_C4_RESIDENCY :
AtomMsr.h
MSR_ATOM_PKG_C6_RESIDENCY :
AtomMsr.h
MSR_ATOM_PLATFORM_ID :
AtomMsr.h
MSR_ATOM_THERM2_CTL :
AtomMsr.h
MSR_BROADWELL_IA32_PERF_GLOBAL_STATUS :
BroadwellMsr.h
MSR_BROADWELL_MSRUNCORE_RATIO_LIMIT :
BroadwellMsr.h
MSR_BROADWELL_PKG_CST_CONFIG_CONTROL :
BroadwellMsr.h
MSR_BROADWELL_PP0_ENERGY_STATUS :
BroadwellMsr.h
MSR_BROADWELL_TURBO_RATIO_LIMIT :
BroadwellMsr.h
MSR_CORE2_EBL_CR_POWERON :
Core2Msr.h
MSR_CORE2_EMON_L3_CTR_CTL0 :
Core2Msr.h
MSR_CORE2_EMON_L3_CTR_CTL1 :
Core2Msr.h
MSR_CORE2_EMON_L3_CTR_CTL2 :
Core2Msr.h
MSR_CORE2_EMON_L3_CTR_CTL3 :
Core2Msr.h
MSR_CORE2_EMON_L3_CTR_CTL4 :
Core2Msr.h
MSR_CORE2_EMON_L3_CTR_CTL5 :
Core2Msr.h
MSR_CORE2_EMON_L3_CTR_CTL6 :
Core2Msr.h
MSR_CORE2_EMON_L3_CTR_CTL7 :
Core2Msr.h
MSR_CORE2_EMON_L3_GL_CTL :
Core2Msr.h
MSR_CORE2_FEATURE_CONTROL :
Core2Msr.h
MSR_CORE2_FSB_FREQ :
Core2Msr.h
MSR_CORE2_IA32_MISC_ENABLE :
Core2Msr.h
MSR_CORE2_LASTBRANCH_0_FROM_IP :
Core2Msr.h
MSR_CORE2_LASTBRANCH_0_TO_IP :
Core2Msr.h
MSR_CORE2_LASTBRANCH_1_FROM_IP :
Core2Msr.h
MSR_CORE2_LASTBRANCH_1_TO_IP :
Core2Msr.h
MSR_CORE2_LASTBRANCH_2_FROM_IP :
Core2Msr.h
MSR_CORE2_LASTBRANCH_2_TO_IP :
Core2Msr.h
MSR_CORE2_LASTBRANCH_3_FROM_IP :
Core2Msr.h
MSR_CORE2_LASTBRANCH_3_TO_IP :
Core2Msr.h
MSR_CORE2_LASTBRANCH_TOS :
Core2Msr.h
MSR_CORE2_LER_FROM_LIP :
Core2Msr.h
MSR_CORE2_LER_TO_LIP :
Core2Msr.h
MSR_CORE2_PEBS_ENABLE :
Core2Msr.h
MSR_CORE2_PERF_CAPABILITIES :
Core2Msr.h
MSR_CORE2_PERF_FIXED_CTR0 :
Core2Msr.h
MSR_CORE2_PERF_FIXED_CTR1 :
Core2Msr.h
MSR_CORE2_PERF_FIXED_CTR2 :
Core2Msr.h
MSR_CORE2_PERF_FIXED_CTR_CTRL :
Core2Msr.h
MSR_CORE2_PERF_GLOBAL_CTRL :
Core2Msr.h
MSR_CORE2_PERF_GLOBAL_OVF_CTRL :
Core2Msr.h
MSR_CORE2_PERF_GLOBAL_STATUS :
Core2Msr.h
MSR_CORE2_PERF_STATUS :
Core2Msr.h
MSR_CORE2_PLATFORM_ID :
Core2Msr.h
MSR_CORE2_SMRR_PHYSBASE :
Core2Msr.h
MSR_CORE2_SMRR_PHYSMASK :
Core2Msr.h
MSR_CORE2_THERM2_CTL :
Core2Msr.h
MSR_CORE_BBL_CR_CTL3 :
CoreMsr.h
MSR_CORE_EBL_CR_POWERON :
CoreMsr.h
MSR_CORE_FSB_FREQ :
CoreMsr.h
MSR_CORE_IA32_EFER :
CoreMsr.h
MSR_CORE_IA32_MISC_ENABLE :
CoreMsr.h
MSR_CORE_LASTBRANCH_0 :
CoreMsr.h
MSR_CORE_LASTBRANCH_1 :
CoreMsr.h
MSR_CORE_LASTBRANCH_2 :
CoreMsr.h
MSR_CORE_LASTBRANCH_3 :
CoreMsr.h
MSR_CORE_LASTBRANCH_4 :
CoreMsr.h
MSR_CORE_LASTBRANCH_5 :
CoreMsr.h
MSR_CORE_LASTBRANCH_6 :
CoreMsr.h
MSR_CORE_LASTBRANCH_7 :
CoreMsr.h
MSR_CORE_LASTBRANCH_TOS :
CoreMsr.h
MSR_CORE_LER_FROM_LIP :
CoreMsr.h
MSR_CORE_LER_TO_LIP :
CoreMsr.h
MSR_CORE_MC3_ADDR :
CoreMsr.h
MSR_CORE_MC3_MISC :
CoreMsr.h
MSR_CORE_MC4_ADDR :
CoreMsr.h
MSR_CORE_MC4_CTL :
CoreMsr.h
MSR_CORE_MC4_STATUS :
CoreMsr.h
MSR_CORE_MC5_ADDR :
CoreMsr.h
MSR_CORE_MC5_CTL :
CoreMsr.h
MSR_CORE_MC5_MISC :
CoreMsr.h
MSR_CORE_MC5_STATUS :
CoreMsr.h
MSR_CORE_MTRRFIX16K_80000 :
CoreMsr.h
MSR_CORE_MTRRFIX16K_A0000 :
CoreMsr.h
MSR_CORE_MTRRFIX4K_C0000 :
CoreMsr.h
MSR_CORE_MTRRFIX4K_C8000 :
CoreMsr.h
MSR_CORE_MTRRFIX4K_D0000 :
CoreMsr.h
MSR_CORE_MTRRFIX4K_D8000 :
CoreMsr.h
MSR_CORE_MTRRFIX4K_E0000 :
CoreMsr.h
MSR_CORE_MTRRFIX4K_E8000 :
CoreMsr.h
MSR_CORE_MTRRFIX4K_F0000 :
CoreMsr.h
MSR_CORE_MTRRFIX4K_F8000 :
CoreMsr.h
MSR_CORE_MTRRFIX64K_00000 :
CoreMsr.h
MSR_CORE_MTRRPHYSBASE0 :
CoreMsr.h
MSR_CORE_MTRRPHYSBASE1 :
CoreMsr.h
MSR_CORE_MTRRPHYSBASE2 :
CoreMsr.h
MSR_CORE_MTRRPHYSBASE3 :
CoreMsr.h
MSR_CORE_MTRRPHYSBASE4 :
CoreMsr.h
MSR_CORE_MTRRPHYSBASE5 :
CoreMsr.h
MSR_CORE_MTRRPHYSBASE6 :
CoreMsr.h
MSR_CORE_MTRRPHYSBASE7 :
CoreMsr.h
MSR_CORE_MTRRPHYSMASK0 :
CoreMsr.h
MSR_CORE_MTRRPHYSMASK1 :
CoreMsr.h
MSR_CORE_MTRRPHYSMASK2 :
CoreMsr.h
MSR_CORE_MTRRPHYSMASK3 :
CoreMsr.h
MSR_CORE_MTRRPHYSMASK4 :
CoreMsr.h
MSR_CORE_MTRRPHYSMASK5 :
CoreMsr.h
MSR_CORE_MTRRPHYSMASK6 :
CoreMsr.h
MSR_CORE_MTRRPHYSMASK7 :
CoreMsr.h
MSR_CORE_P5_MC_ADDR :
CoreMsr.h
MSR_CORE_P5_MC_TYPE :
CoreMsr.h
MSR_CORE_THERM2_CTL :
CoreMsr.h
MSR_GOLDMONT_CORE_C3_RESIDENCY :
GoldmontMsr.h
MSR_GOLDMONT_CORE_PERF_LIMIT_REASONS :
GoldmontMsr.h
MSR_GOLDMONT_DRAM_ENERGY_STATUS :
GoldmontMsr.h
MSR_GOLDMONT_DRAM_PERF_STATUS :
GoldmontMsr.h
MSR_GOLDMONT_DRAM_POWER_INFO :
GoldmontMsr.h
MSR_GOLDMONT_DRAM_POWER_LIMIT :
GoldmontMsr.h
MSR_GOLDMONT_FEATURE_CONTROL :
GoldmontMsr.h
MSR_GOLDMONT_IA32_L2_QOS_MASK_0 :
GoldmontMsr.h
MSR_GOLDMONT_IA32_L2_QOS_MASK_1 :
GoldmontMsr.h
MSR_GOLDMONT_IA32_L2_QOS_MASK_2 :
GoldmontMsr.h
MSR_GOLDMONT_IA32_L2_QOS_MASK_3 :
GoldmontMsr.h
MSR_GOLDMONT_IA32_MISC_ENABLE :
GoldmontMsr.h
MSR_GOLDMONT_IA32_PERF_GLOBAL_STATUS_RESET :
GoldmontMsr.h
MSR_GOLDMONT_IA32_PERF_GLOBAL_STATUS_SET :
GoldmontMsr.h
MSR_GOLDMONT_IA32_PQR_ASSOC :
GoldmontMsr.h
MSR_GOLDMONT_LASTBRANCH_0_FROM_IP :
GoldmontMsr.h
MSR_GOLDMONT_LASTBRANCH_0_TO_IP :
GoldmontMsr.h
MSR_GOLDMONT_LASTBRANCH_10_FROM_IP :
GoldmontMsr.h
MSR_GOLDMONT_LASTBRANCH_10_TO_IP :
GoldmontMsr.h
MSR_GOLDMONT_LASTBRANCH_11_FROM_IP :
GoldmontMsr.h
MSR_GOLDMONT_LASTBRANCH_11_TO_IP :
GoldmontMsr.h
MSR_GOLDMONT_LASTBRANCH_12_FROM_IP :
GoldmontMsr.h
MSR_GOLDMONT_LASTBRANCH_12_TO_IP :
GoldmontMsr.h
MSR_GOLDMONT_LASTBRANCH_13_FROM_IP :
GoldmontMsr.h
MSR_GOLDMONT_LASTBRANCH_13_TO_IP :
GoldmontMsr.h
MSR_GOLDMONT_LASTBRANCH_14_FROM_IP :
GoldmontMsr.h
MSR_GOLDMONT_LASTBRANCH_14_TO_IP :
GoldmontMsr.h
MSR_GOLDMONT_LASTBRANCH_15_FROM_IP :
GoldmontMsr.h
MSR_GOLDMONT_LASTBRANCH_15_TO_IP :
GoldmontMsr.h
MSR_GOLDMONT_LASTBRANCH_16_FROM_IP :
GoldmontMsr.h
MSR_GOLDMONT_LASTBRANCH_16_TO_IP :
GoldmontMsr.h
MSR_GOLDMONT_LASTBRANCH_17_FROM_IP :
GoldmontMsr.h
MSR_GOLDMONT_LASTBRANCH_17_TO_IP :
GoldmontMsr.h
MSR_GOLDMONT_LASTBRANCH_18_FROM_IP :
GoldmontMsr.h
MSR_GOLDMONT_LASTBRANCH_18_TO_IP :
GoldmontMsr.h
MSR_GOLDMONT_LASTBRANCH_19_FROM_IP :
GoldmontMsr.h
MSR_GOLDMONT_LASTBRANCH_19_TO_IP :
GoldmontMsr.h
MSR_GOLDMONT_LASTBRANCH_1_FROM_IP :
GoldmontMsr.h
MSR_GOLDMONT_LASTBRANCH_1_TO_IP :
GoldmontMsr.h
MSR_GOLDMONT_LASTBRANCH_20_FROM_IP :
GoldmontMsr.h
MSR_GOLDMONT_LASTBRANCH_20_TO_IP :
GoldmontMsr.h
MSR_GOLDMONT_LASTBRANCH_21_FROM_IP :
GoldmontMsr.h
MSR_GOLDMONT_LASTBRANCH_21_TO_IP :
GoldmontMsr.h
MSR_GOLDMONT_LASTBRANCH_22_FROM_IP :
GoldmontMsr.h
MSR_GOLDMONT_LASTBRANCH_22_TO_IP :
GoldmontMsr.h
MSR_GOLDMONT_LASTBRANCH_23_FROM_IP :
GoldmontMsr.h
MSR_GOLDMONT_LASTBRANCH_23_TO_IP :
GoldmontMsr.h
MSR_GOLDMONT_LASTBRANCH_24_FROM_IP :
GoldmontMsr.h
MSR_GOLDMONT_LASTBRANCH_24_TO_IP :
GoldmontMsr.h
MSR_GOLDMONT_LASTBRANCH_25_FROM_IP :
GoldmontMsr.h
MSR_GOLDMONT_LASTBRANCH_25_TO_IP :
GoldmontMsr.h
MSR_GOLDMONT_LASTBRANCH_26_FROM_IP :
GoldmontMsr.h
MSR_GOLDMONT_LASTBRANCH_26_TO_IP :
GoldmontMsr.h
MSR_GOLDMONT_LASTBRANCH_27_FROM_IP :
GoldmontMsr.h
MSR_GOLDMONT_LASTBRANCH_27_TO_IP :
GoldmontMsr.h
MSR_GOLDMONT_LASTBRANCH_28_FROM_IP :
GoldmontMsr.h
MSR_GOLDMONT_LASTBRANCH_28_TO_IP :
GoldmontMsr.h
MSR_GOLDMONT_LASTBRANCH_29_FROM_IP :
GoldmontMsr.h
MSR_GOLDMONT_LASTBRANCH_29_TO_IP :
GoldmontMsr.h
MSR_GOLDMONT_LASTBRANCH_2_FROM_IP :
GoldmontMsr.h
MSR_GOLDMONT_LASTBRANCH_2_TO_IP :
GoldmontMsr.h
MSR_GOLDMONT_LASTBRANCH_30_FROM_IP :
GoldmontMsr.h
MSR_GOLDMONT_LASTBRANCH_30_TO_IP :
GoldmontMsr.h
MSR_GOLDMONT_LASTBRANCH_31_FROM_IP :
GoldmontMsr.h
MSR_GOLDMONT_LASTBRANCH_31_TO_IP :
GoldmontMsr.h
MSR_GOLDMONT_LASTBRANCH_3_FROM_IP :
GoldmontMsr.h
MSR_GOLDMONT_LASTBRANCH_3_TO_IP :
GoldmontMsr.h
MSR_GOLDMONT_LASTBRANCH_4_FROM_IP :
GoldmontMsr.h
MSR_GOLDMONT_LASTBRANCH_4_TO_IP :
GoldmontMsr.h
MSR_GOLDMONT_LASTBRANCH_5_FROM_IP :
GoldmontMsr.h
MSR_GOLDMONT_LASTBRANCH_5_TO_IP :
GoldmontMsr.h
MSR_GOLDMONT_LASTBRANCH_6_FROM_IP :
GoldmontMsr.h
MSR_GOLDMONT_LASTBRANCH_6_TO_IP :
GoldmontMsr.h
MSR_GOLDMONT_LASTBRANCH_7_FROM_IP :
GoldmontMsr.h
MSR_GOLDMONT_LASTBRANCH_7_TO_IP :
GoldmontMsr.h
MSR_GOLDMONT_LASTBRANCH_8_FROM_IP :
GoldmontMsr.h
MSR_GOLDMONT_LASTBRANCH_8_TO_IP :
GoldmontMsr.h
MSR_GOLDMONT_LASTBRANCH_9_FROM_IP :
GoldmontMsr.h
MSR_GOLDMONT_LASTBRANCH_9_TO_IP :
GoldmontMsr.h
MSR_GOLDMONT_LASTBRANCH_TOS :
GoldmontMsr.h
MSR_GOLDMONT_LBR_SELECT :
GoldmontMsr.h
MSR_GOLDMONT_MISC_FEATURE_CONTROL :
GoldmontMsr.h
MSR_GOLDMONT_MISC_PWR_MGMT :
GoldmontMsr.h
MSR_GOLDMONT_PEBS_ENABLE :
GoldmontMsr.h
MSR_GOLDMONT_PKG_C10_RESIDENCY :
GoldmontMsr.h
MSR_GOLDMONT_PKG_C2_RESIDENCY :
GoldmontMsr.h
MSR_GOLDMONT_PKG_C3_RESIDENCY :
GoldmontMsr.h
MSR_GOLDMONT_PKG_C6_RESIDENCY :
GoldmontMsr.h
MSR_GOLDMONT_PKG_CST_CONFIG_CONTROL :
GoldmontMsr.h
MSR_GOLDMONT_PKG_ENERGY_STATUS :
GoldmontMsr.h
MSR_GOLDMONT_PKG_PERF_STATUS :
GoldmontMsr.h
MSR_GOLDMONT_PKG_POWER_INFO :
GoldmontMsr.h
MSR_GOLDMONT_PKG_POWER_LIMIT :
GoldmontMsr.h
MSR_GOLDMONT_PKGC3_IRTL :
GoldmontMsr.h
MSR_GOLDMONT_PKGC_IRTL1 :
GoldmontMsr.h
MSR_GOLDMONT_PKGC_IRTL2 :
GoldmontMsr.h
MSR_GOLDMONT_PLATFORM_INFO :
GoldmontMsr.h
MSR_GOLDMONT_PLUS_LASTBRANCH_0_FROM_IP :
GoldmontPlusMsr.h
MSR_GOLDMONT_PLUS_LASTBRANCH_0_TO_IP :
GoldmontPlusMsr.h
MSR_GOLDMONT_PLUS_LASTBRANCH_10_FROM_IP :
GoldmontPlusMsr.h
MSR_GOLDMONT_PLUS_LASTBRANCH_10_TO_IP :
GoldmontPlusMsr.h
MSR_GOLDMONT_PLUS_LASTBRANCH_11_FROM_IP :
GoldmontPlusMsr.h
MSR_GOLDMONT_PLUS_LASTBRANCH_11_TO_IP :
GoldmontPlusMsr.h
MSR_GOLDMONT_PLUS_LASTBRANCH_12_FROM_IP :
GoldmontPlusMsr.h
MSR_GOLDMONT_PLUS_LASTBRANCH_12_TO_IP :
GoldmontPlusMsr.h
MSR_GOLDMONT_PLUS_LASTBRANCH_13_FROM_IP :
GoldmontPlusMsr.h
MSR_GOLDMONT_PLUS_LASTBRANCH_13_TO_IP :
GoldmontPlusMsr.h
MSR_GOLDMONT_PLUS_LASTBRANCH_14_FROM_IP :
GoldmontPlusMsr.h
MSR_GOLDMONT_PLUS_LASTBRANCH_14_TO_IP :
GoldmontPlusMsr.h
MSR_GOLDMONT_PLUS_LASTBRANCH_15_FROM_IP :
GoldmontPlusMsr.h
MSR_GOLDMONT_PLUS_LASTBRANCH_15_TO_IP :
GoldmontPlusMsr.h
MSR_GOLDMONT_PLUS_LASTBRANCH_16_FROM_IP :
GoldmontPlusMsr.h
MSR_GOLDMONT_PLUS_LASTBRANCH_16_TO_IP :
GoldmontPlusMsr.h
MSR_GOLDMONT_PLUS_LASTBRANCH_17_FROM_IP :
GoldmontPlusMsr.h
MSR_GOLDMONT_PLUS_LASTBRANCH_17_TO_IP :
GoldmontPlusMsr.h
MSR_GOLDMONT_PLUS_LASTBRANCH_18_FROM_IP :
GoldmontPlusMsr.h
MSR_GOLDMONT_PLUS_LASTBRANCH_18_TO_IP :
GoldmontPlusMsr.h
MSR_GOLDMONT_PLUS_LASTBRANCH_19_FROM_IP :
GoldmontPlusMsr.h
MSR_GOLDMONT_PLUS_LASTBRANCH_19_TO_IP :
GoldmontPlusMsr.h
MSR_GOLDMONT_PLUS_LASTBRANCH_1_FROM_IP :
GoldmontPlusMsr.h
MSR_GOLDMONT_PLUS_LASTBRANCH_1_TO_IP :
GoldmontPlusMsr.h
MSR_GOLDMONT_PLUS_LASTBRANCH_20_FROM_IP :
GoldmontPlusMsr.h
MSR_GOLDMONT_PLUS_LASTBRANCH_20_TO_IP :
GoldmontPlusMsr.h
MSR_GOLDMONT_PLUS_LASTBRANCH_21_FROM_IP :
GoldmontPlusMsr.h
MSR_GOLDMONT_PLUS_LASTBRANCH_21_TO_IP :
GoldmontPlusMsr.h
MSR_GOLDMONT_PLUS_LASTBRANCH_22_FROM_IP :
GoldmontPlusMsr.h
MSR_GOLDMONT_PLUS_LASTBRANCH_22_TO_IP :
GoldmontPlusMsr.h
MSR_GOLDMONT_PLUS_LASTBRANCH_23_FROM_IP :
GoldmontPlusMsr.h
MSR_GOLDMONT_PLUS_LASTBRANCH_23_TO_IP :
GoldmontPlusMsr.h
MSR_GOLDMONT_PLUS_LASTBRANCH_24_FROM_IP :
GoldmontPlusMsr.h
MSR_GOLDMONT_PLUS_LASTBRANCH_24_TO_IP :
GoldmontPlusMsr.h
MSR_GOLDMONT_PLUS_LASTBRANCH_25_FROM_IP :
GoldmontPlusMsr.h
MSR_GOLDMONT_PLUS_LASTBRANCH_25_TO_IP :
GoldmontPlusMsr.h
MSR_GOLDMONT_PLUS_LASTBRANCH_26_FROM_IP :
GoldmontPlusMsr.h
MSR_GOLDMONT_PLUS_LASTBRANCH_26_TO_IP :
GoldmontPlusMsr.h
MSR_GOLDMONT_PLUS_LASTBRANCH_27_FROM_IP :
GoldmontPlusMsr.h
MSR_GOLDMONT_PLUS_LASTBRANCH_27_TO_IP :
GoldmontPlusMsr.h
MSR_GOLDMONT_PLUS_LASTBRANCH_28_FROM_IP :
GoldmontPlusMsr.h
MSR_GOLDMONT_PLUS_LASTBRANCH_28_TO_IP :
GoldmontPlusMsr.h
MSR_GOLDMONT_PLUS_LASTBRANCH_29_FROM_IP :
GoldmontPlusMsr.h
MSR_GOLDMONT_PLUS_LASTBRANCH_29_TO_IP :
GoldmontPlusMsr.h
MSR_GOLDMONT_PLUS_LASTBRANCH_2_FROM_IP :
GoldmontPlusMsr.h
MSR_GOLDMONT_PLUS_LASTBRANCH_2_TO_IP :
GoldmontPlusMsr.h
MSR_GOLDMONT_PLUS_LASTBRANCH_30_FROM_IP :
GoldmontPlusMsr.h
MSR_GOLDMONT_PLUS_LASTBRANCH_30_TO_IP :
GoldmontPlusMsr.h
MSR_GOLDMONT_PLUS_LASTBRANCH_31_FROM_IP :
GoldmontPlusMsr.h
MSR_GOLDMONT_PLUS_LASTBRANCH_31_TO_IP :
GoldmontPlusMsr.h
MSR_GOLDMONT_PLUS_LASTBRANCH_3_FROM_IP :
GoldmontPlusMsr.h
MSR_GOLDMONT_PLUS_LASTBRANCH_3_TO_IP :
GoldmontPlusMsr.h
MSR_GOLDMONT_PLUS_LASTBRANCH_4_FROM_IP :
GoldmontPlusMsr.h
MSR_GOLDMONT_PLUS_LASTBRANCH_4_TO_IP :
GoldmontPlusMsr.h
MSR_GOLDMONT_PLUS_LASTBRANCH_5_FROM_IP :
GoldmontPlusMsr.h
MSR_GOLDMONT_PLUS_LASTBRANCH_5_TO_IP :
GoldmontPlusMsr.h
MSR_GOLDMONT_PLUS_LASTBRANCH_6_FROM_IP :
GoldmontPlusMsr.h
MSR_GOLDMONT_PLUS_LASTBRANCH_6_TO_IP :
GoldmontPlusMsr.h
MSR_GOLDMONT_PLUS_LASTBRANCH_7_FROM_IP :
GoldmontPlusMsr.h
MSR_GOLDMONT_PLUS_LASTBRANCH_7_TO_IP :
GoldmontPlusMsr.h
MSR_GOLDMONT_PLUS_LASTBRANCH_8_FROM_IP :
GoldmontPlusMsr.h
MSR_GOLDMONT_PLUS_LASTBRANCH_8_TO_IP :
GoldmontPlusMsr.h
MSR_GOLDMONT_PLUS_LASTBRANCH_9_FROM_IP :
GoldmontPlusMsr.h
MSR_GOLDMONT_PLUS_LASTBRANCH_9_TO_IP :
GoldmontPlusMsr.h
MSR_GOLDMONT_PLUS_LASTBRANCH_INFO_0 :
GoldmontPlusMsr.h
MSR_GOLDMONT_PLUS_LASTBRANCH_INFO_1 :
GoldmontPlusMsr.h
MSR_GOLDMONT_PLUS_LASTBRANCH_INFO_10 :
GoldmontPlusMsr.h
MSR_GOLDMONT_PLUS_LASTBRANCH_INFO_11 :
GoldmontPlusMsr.h
MSR_GOLDMONT_PLUS_LASTBRANCH_INFO_12 :
GoldmontPlusMsr.h
MSR_GOLDMONT_PLUS_LASTBRANCH_INFO_13 :
GoldmontPlusMsr.h
MSR_GOLDMONT_PLUS_LASTBRANCH_INFO_14 :
GoldmontPlusMsr.h
MSR_GOLDMONT_PLUS_LASTBRANCH_INFO_15 :
GoldmontPlusMsr.h
MSR_GOLDMONT_PLUS_LASTBRANCH_INFO_16 :
GoldmontPlusMsr.h
MSR_GOLDMONT_PLUS_LASTBRANCH_INFO_17 :
GoldmontPlusMsr.h
MSR_GOLDMONT_PLUS_LASTBRANCH_INFO_18 :
GoldmontPlusMsr.h
MSR_GOLDMONT_PLUS_LASTBRANCH_INFO_19 :
GoldmontPlusMsr.h
MSR_GOLDMONT_PLUS_LASTBRANCH_INFO_2 :
GoldmontPlusMsr.h
MSR_GOLDMONT_PLUS_LASTBRANCH_INFO_20 :
GoldmontPlusMsr.h
MSR_GOLDMONT_PLUS_LASTBRANCH_INFO_21 :
GoldmontPlusMsr.h
MSR_GOLDMONT_PLUS_LASTBRANCH_INFO_22 :
GoldmontPlusMsr.h
MSR_GOLDMONT_PLUS_LASTBRANCH_INFO_23 :
GoldmontPlusMsr.h
MSR_GOLDMONT_PLUS_LASTBRANCH_INFO_24 :
GoldmontPlusMsr.h
MSR_GOLDMONT_PLUS_LASTBRANCH_INFO_25 :
GoldmontPlusMsr.h
MSR_GOLDMONT_PLUS_LASTBRANCH_INFO_26 :
GoldmontPlusMsr.h
MSR_GOLDMONT_PLUS_LASTBRANCH_INFO_27 :
GoldmontPlusMsr.h
MSR_GOLDMONT_PLUS_LASTBRANCH_INFO_28 :
GoldmontPlusMsr.h
MSR_GOLDMONT_PLUS_LASTBRANCH_INFO_29 :
GoldmontPlusMsr.h
MSR_GOLDMONT_PLUS_LASTBRANCH_INFO_3 :
GoldmontPlusMsr.h
MSR_GOLDMONT_PLUS_LASTBRANCH_INFO_30 :
GoldmontPlusMsr.h
MSR_GOLDMONT_PLUS_LASTBRANCH_INFO_31 :
GoldmontPlusMsr.h
MSR_GOLDMONT_PLUS_LASTBRANCH_INFO_4 :
GoldmontPlusMsr.h
MSR_GOLDMONT_PLUS_LASTBRANCH_INFO_5 :
GoldmontPlusMsr.h
MSR_GOLDMONT_PLUS_LASTBRANCH_INFO_6 :
GoldmontPlusMsr.h
MSR_GOLDMONT_PLUS_LASTBRANCH_INFO_7 :
GoldmontPlusMsr.h
MSR_GOLDMONT_PLUS_LASTBRANCH_INFO_8 :
GoldmontPlusMsr.h
MSR_GOLDMONT_PLUS_LASTBRANCH_INFO_9 :
GoldmontPlusMsr.h
MSR_GOLDMONT_PLUS_PEBS_ENABLE :
GoldmontPlusMsr.h
MSR_GOLDMONT_POWER_CTL :
GoldmontMsr.h
MSR_GOLDMONT_PP0_ENERGY_STATUS :
GoldmontMsr.h
MSR_GOLDMONT_PP1_ENERGY_STATUS :
GoldmontMsr.h
MSR_GOLDMONT_RAPL_POWER_UNIT :
GoldmontMsr.h
MSR_GOLDMONT_SGXOWNER0 :
GoldmontMsr.h
MSR_GOLDMONT_SGXOWNER1 :
GoldmontMsr.h
MSR_GOLDMONT_SGXOWNEREPOCH0 :
GoldmontMsr.h
MSR_GOLDMONT_SGXOWNEREPOCH1 :
GoldmontMsr.h
MSR_GOLDMONT_SMM_BLOCKED :
GoldmontMsr.h
MSR_GOLDMONT_SMM_DELAYED :
GoldmontMsr.h
MSR_GOLDMONT_SMM_FEATURE_CONTROL :
GoldmontMsr.h
MSR_GOLDMONT_SMM_MCA_CAP :
GoldmontMsr.h
MSR_GOLDMONT_TURBO_ACTIVATION_RATIO :
GoldmontMsr.h
MSR_GOLDMONT_TURBO_GROUP_CORECNT :
GoldmontMsr.h
MSR_GOLDMONT_TURBO_RATIO_LIMIT :
GoldmontMsr.h
MSR_HASWELL_CONFIG_TDP_CONTROL :
HaswellMsr.h
MSR_HASWELL_CONFIG_TDP_LEVEL1 :
HaswellMsr.h
MSR_HASWELL_CONFIG_TDP_LEVEL2 :
HaswellMsr.h
MSR_HASWELL_CONFIG_TDP_NOMINAL :
HaswellMsr.h
MSR_HASWELL_CORE_PERF_LIMIT_REASONS :
HaswellMsr.h
MSR_HASWELL_DRAM_ENERGY_STATUS :
HaswellMsr.h
MSR_HASWELL_DRAM_PERF_STATUS :
HaswellMsr.h
MSR_HASWELL_E_C0_PMON_BOX_CTL :
HaswellEMsr.h
MSR_HASWELL_E_C0_PMON_BOX_FILTER0 :
HaswellEMsr.h
MSR_HASWELL_E_C0_PMON_BOX_FILTER1 :
HaswellEMsr.h
MSR_HASWELL_E_C0_PMON_BOX_STATUS :
HaswellEMsr.h
MSR_HASWELL_E_C0_PMON_CTR0 :
HaswellEMsr.h
MSR_HASWELL_E_C0_PMON_CTR1 :
HaswellEMsr.h
MSR_HASWELL_E_C0_PMON_CTR2 :
HaswellEMsr.h
MSR_HASWELL_E_C0_PMON_CTR3 :
HaswellEMsr.h
MSR_HASWELL_E_C0_PMON_EVNTSEL0 :
HaswellEMsr.h
MSR_HASWELL_E_C0_PMON_EVNTSEL1 :
HaswellEMsr.h
MSR_HASWELL_E_C0_PMON_EVNTSEL2 :
HaswellEMsr.h
MSR_HASWELL_E_C0_PMON_EVNTSEL3 :
HaswellEMsr.h
MSR_HASWELL_E_C10_PMON_BOX_CTL :
HaswellEMsr.h
MSR_HASWELL_E_C10_PMON_BOX_FILTER0 :
HaswellEMsr.h
MSR_HASWELL_E_C10_PMON_BOX_FILTER1 :
HaswellEMsr.h
MSR_HASWELL_E_C10_PMON_BOX_STATUS :
HaswellEMsr.h
MSR_HASWELL_E_C10_PMON_CTR0 :
HaswellEMsr.h
MSR_HASWELL_E_C10_PMON_CTR1 :
HaswellEMsr.h
MSR_HASWELL_E_C10_PMON_CTR2 :
HaswellEMsr.h
MSR_HASWELL_E_C10_PMON_CTR3 :
HaswellEMsr.h
MSR_HASWELL_E_C10_PMON_EVNTSEL0 :
HaswellEMsr.h
MSR_HASWELL_E_C10_PMON_EVNTSEL1 :
HaswellEMsr.h
MSR_HASWELL_E_C10_PMON_EVNTSEL2 :
HaswellEMsr.h
MSR_HASWELL_E_C10_PMON_EVNTSEL3 :
HaswellEMsr.h
MSR_HASWELL_E_C11_PMON_BOX_CTL :
HaswellEMsr.h
MSR_HASWELL_E_C11_PMON_BOX_FILTER0 :
HaswellEMsr.h
MSR_HASWELL_E_C11_PMON_BOX_FILTER1 :
HaswellEMsr.h
MSR_HASWELL_E_C11_PMON_BOX_STATUS :
HaswellEMsr.h
MSR_HASWELL_E_C11_PMON_CTR0 :
HaswellEMsr.h
MSR_HASWELL_E_C11_PMON_CTR1 :
HaswellEMsr.h
MSR_HASWELL_E_C11_PMON_CTR2 :
HaswellEMsr.h
MSR_HASWELL_E_C11_PMON_CTR3 :
HaswellEMsr.h
MSR_HASWELL_E_C11_PMON_EVNTSEL0 :
HaswellEMsr.h
MSR_HASWELL_E_C11_PMON_EVNTSEL1 :
HaswellEMsr.h
MSR_HASWELL_E_C11_PMON_EVNTSEL2 :
HaswellEMsr.h
MSR_HASWELL_E_C11_PMON_EVNTSEL3 :
HaswellEMsr.h
MSR_HASWELL_E_C12_PMON_BOX_CTL :
HaswellEMsr.h
MSR_HASWELL_E_C12_PMON_BOX_FILTER0 :
HaswellEMsr.h
MSR_HASWELL_E_C12_PMON_BOX_FILTER1 :
HaswellEMsr.h
MSR_HASWELL_E_C12_PMON_BOX_STATUS :
HaswellEMsr.h
MSR_HASWELL_E_C12_PMON_CTR0 :
HaswellEMsr.h
MSR_HASWELL_E_C12_PMON_CTR1 :
HaswellEMsr.h
MSR_HASWELL_E_C12_PMON_CTR2 :
HaswellEMsr.h
MSR_HASWELL_E_C12_PMON_CTR3 :
HaswellEMsr.h
MSR_HASWELL_E_C12_PMON_EVNTSEL0 :
HaswellEMsr.h
MSR_HASWELL_E_C12_PMON_EVNTSEL1 :
HaswellEMsr.h
MSR_HASWELL_E_C12_PMON_EVNTSEL2 :
HaswellEMsr.h
MSR_HASWELL_E_C12_PMON_EVNTSEL3 :
HaswellEMsr.h
MSR_HASWELL_E_C13_PMON_BOX_CTL :
HaswellEMsr.h
MSR_HASWELL_E_C13_PMON_BOX_FILTER0 :
HaswellEMsr.h
MSR_HASWELL_E_C13_PMON_BOX_FILTER1 :
HaswellEMsr.h
MSR_HASWELL_E_C13_PMON_BOX_STATUS :
HaswellEMsr.h
MSR_HASWELL_E_C13_PMON_CTR0 :
HaswellEMsr.h
MSR_HASWELL_E_C13_PMON_CTR1 :
HaswellEMsr.h
MSR_HASWELL_E_C13_PMON_CTR2 :
HaswellEMsr.h
MSR_HASWELL_E_C13_PMON_CTR3 :
HaswellEMsr.h
MSR_HASWELL_E_C13_PMON_EVNTSEL0 :
HaswellEMsr.h
MSR_HASWELL_E_C13_PMON_EVNTSEL1 :
HaswellEMsr.h
MSR_HASWELL_E_C13_PMON_EVNTSEL2 :
HaswellEMsr.h
MSR_HASWELL_E_C13_PMON_EVNTSEL3 :
HaswellEMsr.h
MSR_HASWELL_E_C14_PMON_BOX_CTL :
HaswellEMsr.h
MSR_HASWELL_E_C14_PMON_BOX_FILTER :
HaswellEMsr.h
MSR_HASWELL_E_C14_PMON_BOX_FILTER1 :
HaswellEMsr.h
MSR_HASWELL_E_C14_PMON_BOX_STATUS :
HaswellEMsr.h
MSR_HASWELL_E_C14_PMON_CTR0 :
HaswellEMsr.h
MSR_HASWELL_E_C14_PMON_CTR1 :
HaswellEMsr.h
MSR_HASWELL_E_C14_PMON_CTR2 :
HaswellEMsr.h
MSR_HASWELL_E_C14_PMON_CTR3 :
HaswellEMsr.h
MSR_HASWELL_E_C14_PMON_EVNTSEL0 :
HaswellEMsr.h
MSR_HASWELL_E_C14_PMON_EVNTSEL1 :
HaswellEMsr.h
MSR_HASWELL_E_C14_PMON_EVNTSEL2 :
HaswellEMsr.h
MSR_HASWELL_E_C14_PMON_EVNTSEL3 :
HaswellEMsr.h
MSR_HASWELL_E_C15_PMON_BOX_CTL :
HaswellEMsr.h
MSR_HASWELL_E_C15_PMON_BOX_FILTER0 :
HaswellEMsr.h
MSR_HASWELL_E_C15_PMON_BOX_FILTER1 :
HaswellEMsr.h
MSR_HASWELL_E_C15_PMON_BOX_STATUS :
HaswellEMsr.h
MSR_HASWELL_E_C15_PMON_CTR0 :
HaswellEMsr.h
MSR_HASWELL_E_C15_PMON_CTR1 :
HaswellEMsr.h
MSR_HASWELL_E_C15_PMON_CTR2 :
HaswellEMsr.h
MSR_HASWELL_E_C15_PMON_CTR3 :
HaswellEMsr.h
MSR_HASWELL_E_C15_PMON_EVNTSEL0 :
HaswellEMsr.h
MSR_HASWELL_E_C15_PMON_EVNTSEL1 :
HaswellEMsr.h
MSR_HASWELL_E_C15_PMON_EVNTSEL2 :
HaswellEMsr.h
MSR_HASWELL_E_C15_PMON_EVNTSEL3 :
HaswellEMsr.h
MSR_HASWELL_E_C16_PMON_BOX_CTL :
HaswellEMsr.h
MSR_HASWELL_E_C16_PMON_BOX_FILTER0 :
HaswellEMsr.h
MSR_HASWELL_E_C16_PMON_BOX_FILTER1 :
HaswellEMsr.h
MSR_HASWELL_E_C16_PMON_BOX_STATUS :
HaswellEMsr.h
MSR_HASWELL_E_C16_PMON_CTR0 :
HaswellEMsr.h
MSR_HASWELL_E_C16_PMON_CTR1 :
HaswellEMsr.h
MSR_HASWELL_E_C16_PMON_CTR2 :
HaswellEMsr.h
MSR_HASWELL_E_C16_PMON_CTR3 :
HaswellEMsr.h
MSR_HASWELL_E_C16_PMON_EVNTSEL0 :
HaswellEMsr.h
MSR_HASWELL_E_C16_PMON_EVNTSEL1 :
HaswellEMsr.h
MSR_HASWELL_E_C16_PMON_EVNTSEL2 :
HaswellEMsr.h
MSR_HASWELL_E_C16_PMON_EVNTSEL3 :
HaswellEMsr.h
MSR_HASWELL_E_C17_PMON_BOX_CTL :
HaswellEMsr.h
MSR_HASWELL_E_C17_PMON_BOX_FILTER0 :
HaswellEMsr.h
MSR_HASWELL_E_C17_PMON_BOX_FILTER1 :
HaswellEMsr.h
MSR_HASWELL_E_C17_PMON_BOX_STATUS :
HaswellEMsr.h
MSR_HASWELL_E_C17_PMON_CTR0 :
HaswellEMsr.h
MSR_HASWELL_E_C17_PMON_CTR1 :
HaswellEMsr.h
MSR_HASWELL_E_C17_PMON_CTR2 :
HaswellEMsr.h
MSR_HASWELL_E_C17_PMON_CTR3 :
HaswellEMsr.h
MSR_HASWELL_E_C17_PMON_EVNTSEL0 :
HaswellEMsr.h
MSR_HASWELL_E_C17_PMON_EVNTSEL1 :
HaswellEMsr.h
MSR_HASWELL_E_C17_PMON_EVNTSEL2 :
HaswellEMsr.h
MSR_HASWELL_E_C17_PMON_EVNTSEL3 :
HaswellEMsr.h
MSR_HASWELL_E_C1_PMON_BOX_CTL :
HaswellEMsr.h
MSR_HASWELL_E_C1_PMON_BOX_FILTER0 :
HaswellEMsr.h
MSR_HASWELL_E_C1_PMON_BOX_FILTER1 :
HaswellEMsr.h
MSR_HASWELL_E_C1_PMON_BOX_STATUS :
HaswellEMsr.h
MSR_HASWELL_E_C1_PMON_CTR0 :
HaswellEMsr.h
MSR_HASWELL_E_C1_PMON_CTR1 :
HaswellEMsr.h
MSR_HASWELL_E_C1_PMON_CTR2 :
HaswellEMsr.h
MSR_HASWELL_E_C1_PMON_CTR3 :
HaswellEMsr.h
MSR_HASWELL_E_C1_PMON_EVNTSEL0 :
HaswellEMsr.h
MSR_HASWELL_E_C1_PMON_EVNTSEL1 :
HaswellEMsr.h
MSR_HASWELL_E_C1_PMON_EVNTSEL2 :
HaswellEMsr.h
MSR_HASWELL_E_C1_PMON_EVNTSEL3 :
HaswellEMsr.h
MSR_HASWELL_E_C2_PMON_BOX_CTL :
HaswellEMsr.h
MSR_HASWELL_E_C2_PMON_BOX_FILTER0 :
HaswellEMsr.h
MSR_HASWELL_E_C2_PMON_BOX_FILTER1 :
HaswellEMsr.h
MSR_HASWELL_E_C2_PMON_BOX_STATUS :
HaswellEMsr.h
MSR_HASWELL_E_C2_PMON_CTR0 :
HaswellEMsr.h
MSR_HASWELL_E_C2_PMON_CTR1 :
HaswellEMsr.h
MSR_HASWELL_E_C2_PMON_CTR2 :
HaswellEMsr.h
MSR_HASWELL_E_C2_PMON_CTR3 :
HaswellEMsr.h
MSR_HASWELL_E_C2_PMON_EVNTSEL0 :
HaswellEMsr.h
MSR_HASWELL_E_C2_PMON_EVNTSEL1 :
HaswellEMsr.h
MSR_HASWELL_E_C2_PMON_EVNTSEL2 :
HaswellEMsr.h
MSR_HASWELL_E_C2_PMON_EVNTSEL3 :
HaswellEMsr.h
MSR_HASWELL_E_C3_PMON_BOX_CTL :
HaswellEMsr.h
MSR_HASWELL_E_C3_PMON_BOX_FILTER0 :
HaswellEMsr.h
MSR_HASWELL_E_C3_PMON_BOX_FILTER1 :
HaswellEMsr.h
MSR_HASWELL_E_C3_PMON_BOX_STATUS :
HaswellEMsr.h
MSR_HASWELL_E_C3_PMON_CTR0 :
HaswellEMsr.h
MSR_HASWELL_E_C3_PMON_CTR1 :
HaswellEMsr.h
MSR_HASWELL_E_C3_PMON_CTR2 :
HaswellEMsr.h
MSR_HASWELL_E_C3_PMON_CTR3 :
HaswellEMsr.h
MSR_HASWELL_E_C3_PMON_EVNTSEL0 :
HaswellEMsr.h
MSR_HASWELL_E_C3_PMON_EVNTSEL1 :
HaswellEMsr.h
MSR_HASWELL_E_C3_PMON_EVNTSEL2 :
HaswellEMsr.h
MSR_HASWELL_E_C3_PMON_EVNTSEL3 :
HaswellEMsr.h
MSR_HASWELL_E_C4_PMON_BOX_CTL :
HaswellEMsr.h
MSR_HASWELL_E_C4_PMON_BOX_FILTER0 :
HaswellEMsr.h
MSR_HASWELL_E_C4_PMON_BOX_FILTER1 :
HaswellEMsr.h
MSR_HASWELL_E_C4_PMON_BOX_STATUS :
HaswellEMsr.h
MSR_HASWELL_E_C4_PMON_CTR0 :
HaswellEMsr.h
MSR_HASWELL_E_C4_PMON_CTR1 :
HaswellEMsr.h
MSR_HASWELL_E_C4_PMON_CTR2 :
HaswellEMsr.h
MSR_HASWELL_E_C4_PMON_CTR3 :
HaswellEMsr.h
MSR_HASWELL_E_C4_PMON_EVNTSEL0 :
HaswellEMsr.h
MSR_HASWELL_E_C4_PMON_EVNTSEL1 :
HaswellEMsr.h
MSR_HASWELL_E_C4_PMON_EVNTSEL2 :
HaswellEMsr.h
MSR_HASWELL_E_C4_PMON_EVNTSEL3 :
HaswellEMsr.h
MSR_HASWELL_E_C5_PMON_BOX_CTL :
HaswellEMsr.h
MSR_HASWELL_E_C5_PMON_BOX_FILTER0 :
HaswellEMsr.h
MSR_HASWELL_E_C5_PMON_BOX_FILTER1 :
HaswellEMsr.h
MSR_HASWELL_E_C5_PMON_BOX_STATUS :
HaswellEMsr.h
MSR_HASWELL_E_C5_PMON_CTR0 :
HaswellEMsr.h
MSR_HASWELL_E_C5_PMON_CTR1 :
HaswellEMsr.h
MSR_HASWELL_E_C5_PMON_CTR2 :
HaswellEMsr.h
MSR_HASWELL_E_C5_PMON_CTR3 :
HaswellEMsr.h
MSR_HASWELL_E_C5_PMON_EVNTSEL0 :
HaswellEMsr.h
MSR_HASWELL_E_C5_PMON_EVNTSEL1 :
HaswellEMsr.h
MSR_HASWELL_E_C5_PMON_EVNTSEL2 :
HaswellEMsr.h
MSR_HASWELL_E_C5_PMON_EVNTSEL3 :
HaswellEMsr.h
MSR_HASWELL_E_C6_PMON_BOX_CTL :
HaswellEMsr.h
MSR_HASWELL_E_C6_PMON_BOX_FILTER0 :
HaswellEMsr.h
MSR_HASWELL_E_C6_PMON_BOX_FILTER1 :
HaswellEMsr.h
MSR_HASWELL_E_C6_PMON_BOX_STATUS :
HaswellEMsr.h
MSR_HASWELL_E_C6_PMON_CTR0 :
HaswellEMsr.h
MSR_HASWELL_E_C6_PMON_CTR1 :
HaswellEMsr.h
MSR_HASWELL_E_C6_PMON_CTR2 :
HaswellEMsr.h
MSR_HASWELL_E_C6_PMON_CTR3 :
HaswellEMsr.h
MSR_HASWELL_E_C6_PMON_EVNTSEL0 :
HaswellEMsr.h
MSR_HASWELL_E_C6_PMON_EVNTSEL1 :
HaswellEMsr.h
MSR_HASWELL_E_C6_PMON_EVNTSEL2 :
HaswellEMsr.h
MSR_HASWELL_E_C6_PMON_EVNTSEL3 :
HaswellEMsr.h
MSR_HASWELL_E_C7_PMON_BOX_CTL :
HaswellEMsr.h
MSR_HASWELL_E_C7_PMON_BOX_FILTER0 :
HaswellEMsr.h
MSR_HASWELL_E_C7_PMON_BOX_FILTER1 :
HaswellEMsr.h
MSR_HASWELL_E_C7_PMON_BOX_STATUS :
HaswellEMsr.h
MSR_HASWELL_E_C7_PMON_CTR0 :
HaswellEMsr.h
MSR_HASWELL_E_C7_PMON_CTR1 :
HaswellEMsr.h
MSR_HASWELL_E_C7_PMON_CTR2 :
HaswellEMsr.h
MSR_HASWELL_E_C7_PMON_CTR3 :
HaswellEMsr.h
MSR_HASWELL_E_C7_PMON_EVNTSEL0 :
HaswellEMsr.h
MSR_HASWELL_E_C7_PMON_EVNTSEL1 :
HaswellEMsr.h
MSR_HASWELL_E_C7_PMON_EVNTSEL2 :
HaswellEMsr.h
MSR_HASWELL_E_C7_PMON_EVNTSEL3 :
HaswellEMsr.h
MSR_HASWELL_E_C8_PMON_BOX_CTL :
HaswellEMsr.h
MSR_HASWELL_E_C8_PMON_BOX_FILTER0 :
HaswellEMsr.h
MSR_HASWELL_E_C8_PMON_BOX_FILTER1 :
HaswellEMsr.h
MSR_HASWELL_E_C8_PMON_BOX_STATUS :
HaswellEMsr.h
MSR_HASWELL_E_C8_PMON_CTR0 :
HaswellEMsr.h
MSR_HASWELL_E_C8_PMON_CTR1 :
HaswellEMsr.h
MSR_HASWELL_E_C8_PMON_CTR2 :
HaswellEMsr.h
MSR_HASWELL_E_C8_PMON_CTR3 :
HaswellEMsr.h
MSR_HASWELL_E_C8_PMON_EVNTSEL0 :
HaswellEMsr.h
MSR_HASWELL_E_C8_PMON_EVNTSEL1 :
HaswellEMsr.h
MSR_HASWELL_E_C8_PMON_EVNTSEL2 :
HaswellEMsr.h
MSR_HASWELL_E_C8_PMON_EVNTSEL3 :
HaswellEMsr.h
MSR_HASWELL_E_C9_PMON_BOX_CTL :
HaswellEMsr.h
MSR_HASWELL_E_C9_PMON_BOX_FILTER0 :
HaswellEMsr.h
MSR_HASWELL_E_C9_PMON_BOX_FILTER1 :
HaswellEMsr.h
MSR_HASWELL_E_C9_PMON_BOX_STATUS :
HaswellEMsr.h
MSR_HASWELL_E_C9_PMON_CTR0 :
HaswellEMsr.h
MSR_HASWELL_E_C9_PMON_CTR1 :
HaswellEMsr.h
MSR_HASWELL_E_C9_PMON_CTR2 :
HaswellEMsr.h
MSR_HASWELL_E_C9_PMON_CTR3 :
HaswellEMsr.h
MSR_HASWELL_E_C9_PMON_EVNTSEL0 :
HaswellEMsr.h
MSR_HASWELL_E_C9_PMON_EVNTSEL1 :
HaswellEMsr.h
MSR_HASWELL_E_C9_PMON_EVNTSEL2 :
HaswellEMsr.h
MSR_HASWELL_E_C9_PMON_EVNTSEL3 :
HaswellEMsr.h
MSR_HASWELL_E_CORE_PERF_LIMIT_REASONS :
HaswellEMsr.h
MSR_HASWELL_E_CORE_THREAD_COUNT :
HaswellEMsr.h
MSR_HASWELL_E_DRAM_ENERGY_STATUS :
HaswellEMsr.h
MSR_HASWELL_E_DRAM_PERF_STATUS :
HaswellEMsr.h
MSR_HASWELL_E_DRAM_POWER_INFO :
HaswellEMsr.h
MSR_HASWELL_E_DRAM_POWER_LIMIT :
HaswellEMsr.h
MSR_HASWELL_E_ERROR_CONTROL :
HaswellEMsr.h
MSR_HASWELL_E_IA32_MCG_CAP :
HaswellEMsr.h
MSR_HASWELL_E_IA32_PQR_ASSOC :
HaswellEMsr.h
MSR_HASWELL_E_IA32_QM_EVTSEL :
HaswellEMsr.h
MSR_HASWELL_E_MSRUNCORE_RATIO_LIMIT :
HaswellEMsr.h
MSR_HASWELL_E_PCIE_PLL_RATIO :
HaswellEMsr.h
MSR_HASWELL_E_PCU_PMON_BOX_CTL :
HaswellEMsr.h
MSR_HASWELL_E_PCU_PMON_BOX_FILTER :
HaswellEMsr.h
MSR_HASWELL_E_PCU_PMON_BOX_STATUS :
HaswellEMsr.h
MSR_HASWELL_E_PCU_PMON_CTR0 :
HaswellEMsr.h
MSR_HASWELL_E_PCU_PMON_CTR1 :
HaswellEMsr.h
MSR_HASWELL_E_PCU_PMON_CTR2 :
HaswellEMsr.h
MSR_HASWELL_E_PCU_PMON_CTR3 :
HaswellEMsr.h
MSR_HASWELL_E_PCU_PMON_EVNTSEL0 :
HaswellEMsr.h
MSR_HASWELL_E_PCU_PMON_EVNTSEL1 :
HaswellEMsr.h
MSR_HASWELL_E_PCU_PMON_EVNTSEL2 :
HaswellEMsr.h
MSR_HASWELL_E_PCU_PMON_EVNTSEL3 :
HaswellEMsr.h
MSR_HASWELL_E_PKG_CST_CONFIG_CONTROL :
HaswellEMsr.h
MSR_HASWELL_E_PMON_GLOBAL_CONFIG :
HaswellEMsr.h
MSR_HASWELL_E_PMON_GLOBAL_CTL :
HaswellEMsr.h
MSR_HASWELL_E_PMON_GLOBAL_STATUS :
HaswellEMsr.h
MSR_HASWELL_E_PP0_ENERGY_STATUS :
HaswellEMsr.h
MSR_HASWELL_E_RAPL_POWER_UNIT :
HaswellEMsr.h
MSR_HASWELL_E_S0_PMON_BOX_CTL :
HaswellEMsr.h
MSR_HASWELL_E_S0_PMON_BOX_FILTER :
HaswellEMsr.h
MSR_HASWELL_E_S0_PMON_CTR0 :
HaswellEMsr.h
MSR_HASWELL_E_S0_PMON_CTR1 :
HaswellEMsr.h
MSR_HASWELL_E_S0_PMON_CTR2 :
HaswellEMsr.h
MSR_HASWELL_E_S0_PMON_CTR3 :
HaswellEMsr.h
MSR_HASWELL_E_S0_PMON_EVNTSEL0 :
HaswellEMsr.h
MSR_HASWELL_E_S0_PMON_EVNTSEL1 :
HaswellEMsr.h
MSR_HASWELL_E_S0_PMON_EVNTSEL2 :
HaswellEMsr.h
MSR_HASWELL_E_S0_PMON_EVNTSEL3 :
HaswellEMsr.h
MSR_HASWELL_E_S1_PMON_BOX_CTL :
HaswellEMsr.h
MSR_HASWELL_E_S1_PMON_BOX_FILTER :
HaswellEMsr.h
MSR_HASWELL_E_S1_PMON_CTR0 :
HaswellEMsr.h
MSR_HASWELL_E_S1_PMON_CTR1 :
HaswellEMsr.h
MSR_HASWELL_E_S1_PMON_CTR2 :
HaswellEMsr.h
MSR_HASWELL_E_S1_PMON_CTR3 :
HaswellEMsr.h
MSR_HASWELL_E_S1_PMON_EVNTSEL0 :
HaswellEMsr.h
MSR_HASWELL_E_S1_PMON_EVNTSEL1 :
HaswellEMsr.h
MSR_HASWELL_E_S1_PMON_EVNTSEL2 :
HaswellEMsr.h
MSR_HASWELL_E_S1_PMON_EVNTSEL3 :
HaswellEMsr.h
MSR_HASWELL_E_S2_PMON_BOX_CTL :
HaswellEMsr.h
MSR_HASWELL_E_S2_PMON_BOX_FILTER :
HaswellEMsr.h
MSR_HASWELL_E_S2_PMON_CTR0 :
HaswellEMsr.h
MSR_HASWELL_E_S2_PMON_CTR1 :
HaswellEMsr.h
MSR_HASWELL_E_S2_PMON_CTR2 :
HaswellEMsr.h
MSR_HASWELL_E_S2_PMON_CTR3 :
HaswellEMsr.h
MSR_HASWELL_E_S2_PMON_EVNTSEL0 :
HaswellEMsr.h
MSR_HASWELL_E_S2_PMON_EVNTSEL1 :
HaswellEMsr.h
MSR_HASWELL_E_S2_PMON_EVNTSEL2 :
HaswellEMsr.h
MSR_HASWELL_E_S2_PMON_EVNTSEL3 :
HaswellEMsr.h
MSR_HASWELL_E_S3_PMON_BOX_CTL :
HaswellEMsr.h
MSR_HASWELL_E_S3_PMON_BOX_FILTER :
HaswellEMsr.h
MSR_HASWELL_E_S3_PMON_CTR0 :
HaswellEMsr.h
MSR_HASWELL_E_S3_PMON_CTR1 :
HaswellEMsr.h
MSR_HASWELL_E_S3_PMON_CTR2 :
HaswellEMsr.h
MSR_HASWELL_E_S3_PMON_CTR3 :
HaswellEMsr.h
MSR_HASWELL_E_S3_PMON_EVNTSEL0 :
HaswellEMsr.h
MSR_HASWELL_E_S3_PMON_EVNTSEL1 :
HaswellEMsr.h
MSR_HASWELL_E_S3_PMON_EVNTSEL2 :
HaswellEMsr.h
MSR_HASWELL_E_S3_PMON_EVNTSEL3 :
HaswellEMsr.h
MSR_HASWELL_E_SMM_MCA_CAP :
HaswellEMsr.h
MSR_HASWELL_E_THREAD_ID_INFO :
HaswellEMsr.h
MSR_HASWELL_E_TURBO_RATIO_LIMIT :
HaswellEMsr.h
MSR_HASWELL_E_TURBO_RATIO_LIMIT1 :
HaswellEMsr.h
MSR_HASWELL_E_TURBO_RATIO_LIMIT2 :
HaswellEMsr.h
MSR_HASWELL_E_U_PMON_BOX_STATUS :
HaswellEMsr.h
MSR_HASWELL_E_U_PMON_CTR0 :
HaswellEMsr.h
MSR_HASWELL_E_U_PMON_CTR1 :
HaswellEMsr.h
MSR_HASWELL_E_U_PMON_EVNTSEL0 :
HaswellEMsr.h
MSR_HASWELL_E_U_PMON_EVNTSEL1 :
HaswellEMsr.h
MSR_HASWELL_E_U_PMON_UCLK_FIXED_CTL :
HaswellEMsr.h
MSR_HASWELL_E_U_PMON_UCLK_FIXED_CTR :
HaswellEMsr.h
MSR_HASWELL_GRAPHICS_PERF_LIMIT_REASONS :
HaswellMsr.h
MSR_HASWELL_IA32_PERFEVTSEL0 :
HaswellMsr.h
MSR_HASWELL_IA32_PERFEVTSEL1 :
HaswellMsr.h
MSR_HASWELL_IA32_PERFEVTSEL2 :
HaswellMsr.h
MSR_HASWELL_IA32_PERFEVTSEL3 :
HaswellMsr.h
MSR_HASWELL_LBR_SELECT :
HaswellMsr.h
MSR_HASWELL_PKG_C10_RESIDENCY :
HaswellMsr.h
MSR_HASWELL_PKG_C8_RESIDENCY :
HaswellMsr.h
MSR_HASWELL_PKG_C9_RESIDENCY :
HaswellMsr.h
MSR_HASWELL_PKG_CST_CONFIG_CONTROL :
HaswellMsr.h
MSR_HASWELL_PKG_PERF_STATUS :
HaswellMsr.h
MSR_HASWELL_PKGC_IRTL1 :
HaswellMsr.h
MSR_HASWELL_PKGC_IRTL2 :
HaswellMsr.h
MSR_HASWELL_PLATFORM_INFO :
HaswellMsr.h
MSR_HASWELL_PP0_ENERGY_STATUS :
HaswellMsr.h
MSR_HASWELL_PP1_ENERGY_STATUS :
HaswellMsr.h
MSR_HASWELL_PP1_POLICY :
HaswellMsr.h
MSR_HASWELL_PP1_POWER_LIMIT :
HaswellMsr.h
MSR_HASWELL_RAPL_POWER_UNIT :
HaswellMsr.h
MSR_HASWELL_RING_PERF_LIMIT_REASONS :
HaswellMsr.h
MSR_HASWELL_SMM_BLOCKED :
HaswellMsr.h
MSR_HASWELL_SMM_DELAYED :
HaswellMsr.h
MSR_HASWELL_SMM_FEATURE_CONTROL :
HaswellMsr.h
MSR_HASWELL_SMM_MCA_CAP :
HaswellMsr.h
MSR_HASWELL_TURBO_ACTIVATION_RATIO :
HaswellMsr.h
MSR_HASWELL_TURBO_RATIO_LIMIT :
HaswellMsr.h
MSR_HASWELL_UNC_ARB_PERFCTR0 :
HaswellMsr.h
MSR_HASWELL_UNC_ARB_PERFCTR1 :
HaswellMsr.h
MSR_HASWELL_UNC_ARB_PERFEVTSEL0 :
HaswellMsr.h
MSR_HASWELL_UNC_ARB_PERFEVTSEL1 :
HaswellMsr.h
MSR_HASWELL_UNC_CBO_0_PERFCTR0 :
HaswellMsr.h
MSR_HASWELL_UNC_CBO_0_PERFCTR1 :
HaswellMsr.h
MSR_HASWELL_UNC_CBO_0_PERFEVTSEL0 :
HaswellMsr.h
MSR_HASWELL_UNC_CBO_0_PERFEVTSEL1 :
HaswellMsr.h
MSR_HASWELL_UNC_CBO_1_PERFCTR0 :
HaswellMsr.h
MSR_HASWELL_UNC_CBO_1_PERFCTR1 :
HaswellMsr.h
MSR_HASWELL_UNC_CBO_1_PERFEVTSEL0 :
HaswellMsr.h
MSR_HASWELL_UNC_CBO_1_PERFEVTSEL1 :
HaswellMsr.h
MSR_HASWELL_UNC_CBO_2_PERFCTR0 :
HaswellMsr.h
MSR_HASWELL_UNC_CBO_2_PERFCTR1 :
HaswellMsr.h
MSR_HASWELL_UNC_CBO_2_PERFEVTSEL0 :
HaswellMsr.h
MSR_HASWELL_UNC_CBO_2_PERFEVTSEL1 :
HaswellMsr.h
MSR_HASWELL_UNC_CBO_3_PERFCTR0 :
HaswellMsr.h
MSR_HASWELL_UNC_CBO_3_PERFCTR1 :
HaswellMsr.h
MSR_HASWELL_UNC_CBO_3_PERFEVTSEL0 :
HaswellMsr.h
MSR_HASWELL_UNC_CBO_3_PERFEVTSEL1 :
HaswellMsr.h
MSR_HASWELL_UNC_CBO_CONFIG :
HaswellMsr.h
MSR_HASWELL_UNC_PERF_FIXED_CTR :
HaswellMsr.h
MSR_HASWELL_UNC_PERF_FIXED_CTRL :
HaswellMsr.h
MSR_HASWELL_UNC_PERF_GLOBAL_CTRL :
HaswellMsr.h
MSR_HASWELL_UNC_PERF_GLOBAL_STATUS :
HaswellMsr.h
MSR_IA32_A_PMC0 :
ArchitecturalMsr.h
MSR_IA32_A_PMC1 :
ArchitecturalMsr.h
MSR_IA32_A_PMC2 :
ArchitecturalMsr.h
MSR_IA32_A_PMC3 :
ArchitecturalMsr.h
MSR_IA32_A_PMC4 :
ArchitecturalMsr.h
MSR_IA32_A_PMC5 :
ArchitecturalMsr.h
MSR_IA32_A_PMC6 :
ArchitecturalMsr.h
MSR_IA32_A_PMC7 :
ArchitecturalMsr.h
MSR_IA32_APERF :
ArchitecturalMsr.h
MSR_IA32_APIC_BASE :
ArchitecturalMsr.h
MSR_IA32_BIOS_SIGN_ID :
ArchitecturalMsr.h
MSR_IA32_BIOS_UPDT_TRIG :
ArchitecturalMsr.h
MSR_IA32_BNDCFGS :
ArchitecturalMsr.h
MSR_IA32_CLOCK_MODULATION :
ArchitecturalMsr.h
MSR_IA32_CPU_DCA_CAP :
ArchitecturalMsr.h
MSR_IA32_CSTAR :
ArchitecturalMsr.h
MSR_IA32_DCA_0_CAP :
ArchitecturalMsr.h
MSR_IA32_DEBUG_INTERFACE :
ArchitecturalMsr.h
MSR_IA32_DEBUGCTL :
ArchitecturalMsr.h
MSR_IA32_DS_AREA :
ArchitecturalMsr.h
MSR_IA32_EFER :
ArchitecturalMsr.h
MSR_IA32_ENERGY_PERF_BIAS :
ArchitecturalMsr.h
MSR_IA32_FEATURE_CONTROL :
ArchitecturalMsr.h
MSR_IA32_FIXED_CTR0 :
ArchitecturalMsr.h
MSR_IA32_FIXED_CTR1 :
ArchitecturalMsr.h
MSR_IA32_FIXED_CTR2 :
ArchitecturalMsr.h
MSR_IA32_FIXED_CTR_CTRL :
ArchitecturalMsr.h
MSR_IA32_FMASK :
ArchitecturalMsr.h
MSR_IA32_FS_BASE :
ArchitecturalMsr.h
MSR_IA32_GS_BASE :
ArchitecturalMsr.h
MSR_IA32_HWP_CAPABILITIES :
ArchitecturalMsr.h
MSR_IA32_HWP_INTERRUPT :
ArchitecturalMsr.h
MSR_IA32_HWP_REQUEST :
ArchitecturalMsr.h
MSR_IA32_HWP_REQUEST_PKG :
ArchitecturalMsr.h
MSR_IA32_HWP_STATUS :
ArchitecturalMsr.h
MSR_IA32_KERNEL_GS_BASE :
ArchitecturalMsr.h
MSR_IA32_L2_QOS_CFG :
ArchitecturalMsr.h
MSR_IA32_L3_QOS_CFG :
ArchitecturalMsr.h
MSR_IA32_LSTAR :
ArchitecturalMsr.h
MSR_IA32_MC0_ADDR :
ArchitecturalMsr.h
MSR_IA32_MC0_CTL :
ArchitecturalMsr.h
MSR_IA32_MC0_CTL2 :
ArchitecturalMsr.h
MSR_IA32_MC0_MISC :
ArchitecturalMsr.h
MSR_IA32_MC0_STATUS :
ArchitecturalMsr.h
MSR_IA32_MC10_ADDR :
ArchitecturalMsr.h
MSR_IA32_MC10_CTL :
ArchitecturalMsr.h
MSR_IA32_MC10_CTL2 :
ArchitecturalMsr.h
MSR_IA32_MC10_MISC :
ArchitecturalMsr.h
MSR_IA32_MC10_STATUS :
ArchitecturalMsr.h
MSR_IA32_MC11_ADDR :
ArchitecturalMsr.h
MSR_IA32_MC11_CTL :
ArchitecturalMsr.h
MSR_IA32_MC11_CTL2 :
ArchitecturalMsr.h
MSR_IA32_MC11_MISC :
ArchitecturalMsr.h
MSR_IA32_MC11_STATUS :
ArchitecturalMsr.h
MSR_IA32_MC12_ADDR :
ArchitecturalMsr.h
MSR_IA32_MC12_CTL :
ArchitecturalMsr.h
MSR_IA32_MC12_CTL2 :
ArchitecturalMsr.h
MSR_IA32_MC12_MISC :
ArchitecturalMsr.h
MSR_IA32_MC12_STATUS :
ArchitecturalMsr.h
MSR_IA32_MC13_ADDR :
ArchitecturalMsr.h
MSR_IA32_MC13_CTL :
ArchitecturalMsr.h
MSR_IA32_MC13_CTL2 :
ArchitecturalMsr.h
MSR_IA32_MC13_MISC :
ArchitecturalMsr.h
MSR_IA32_MC13_STATUS :
ArchitecturalMsr.h
MSR_IA32_MC14_ADDR :
ArchitecturalMsr.h
MSR_IA32_MC14_CTL :
ArchitecturalMsr.h
MSR_IA32_MC14_CTL2 :
ArchitecturalMsr.h
MSR_IA32_MC14_MISC :
ArchitecturalMsr.h
MSR_IA32_MC14_STATUS :
ArchitecturalMsr.h
MSR_IA32_MC15_ADDR :
ArchitecturalMsr.h
MSR_IA32_MC15_CTL :
ArchitecturalMsr.h
MSR_IA32_MC15_CTL2 :
ArchitecturalMsr.h
MSR_IA32_MC15_MISC :
ArchitecturalMsr.h
MSR_IA32_MC15_STATUS :
ArchitecturalMsr.h
MSR_IA32_MC16_ADDR :
ArchitecturalMsr.h
MSR_IA32_MC16_CTL :
ArchitecturalMsr.h
MSR_IA32_MC16_CTL2 :
ArchitecturalMsr.h
MSR_IA32_MC16_MISC :
ArchitecturalMsr.h
MSR_IA32_MC16_STATUS :
ArchitecturalMsr.h
MSR_IA32_MC17_ADDR :
ArchitecturalMsr.h
MSR_IA32_MC17_CTL :
ArchitecturalMsr.h
MSR_IA32_MC17_CTL2 :
ArchitecturalMsr.h
MSR_IA32_MC17_MISC :
ArchitecturalMsr.h
MSR_IA32_MC17_STATUS :
ArchitecturalMsr.h
MSR_IA32_MC18_ADDR :
ArchitecturalMsr.h
MSR_IA32_MC18_CTL :
ArchitecturalMsr.h
MSR_IA32_MC18_CTL2 :
ArchitecturalMsr.h
MSR_IA32_MC18_MISC :
ArchitecturalMsr.h
MSR_IA32_MC18_STATUS :
ArchitecturalMsr.h
MSR_IA32_MC19_ADDR :
ArchitecturalMsr.h
MSR_IA32_MC19_CTL :
ArchitecturalMsr.h
MSR_IA32_MC19_CTL2 :
ArchitecturalMsr.h
MSR_IA32_MC19_MISC :
ArchitecturalMsr.h
MSR_IA32_MC19_STATUS :
ArchitecturalMsr.h
MSR_IA32_MC1_ADDR :
ArchitecturalMsr.h
MSR_IA32_MC1_CTL :
ArchitecturalMsr.h
MSR_IA32_MC1_CTL2 :
ArchitecturalMsr.h
MSR_IA32_MC1_MISC :
ArchitecturalMsr.h
MSR_IA32_MC1_STATUS :
ArchitecturalMsr.h
MSR_IA32_MC20_ADDR :
ArchitecturalMsr.h
MSR_IA32_MC20_CTL :
ArchitecturalMsr.h
MSR_IA32_MC20_CTL2 :
ArchitecturalMsr.h
MSR_IA32_MC20_MISC :
ArchitecturalMsr.h
MSR_IA32_MC20_STATUS :
ArchitecturalMsr.h
MSR_IA32_MC21_ADDR :
ArchitecturalMsr.h
MSR_IA32_MC21_CTL :
ArchitecturalMsr.h
MSR_IA32_MC21_CTL2 :
ArchitecturalMsr.h
MSR_IA32_MC21_MISC :
ArchitecturalMsr.h
MSR_IA32_MC21_STATUS :
ArchitecturalMsr.h
MSR_IA32_MC22_ADDR :
ArchitecturalMsr.h
MSR_IA32_MC22_CTL :
ArchitecturalMsr.h
MSR_IA32_MC22_CTL2 :
ArchitecturalMsr.h
MSR_IA32_MC22_MISC :
ArchitecturalMsr.h
MSR_IA32_MC22_STATUS :
ArchitecturalMsr.h
MSR_IA32_MC23_ADDR :
ArchitecturalMsr.h
MSR_IA32_MC23_CTL :
ArchitecturalMsr.h
MSR_IA32_MC23_CTL2 :
ArchitecturalMsr.h
MSR_IA32_MC23_MISC :
ArchitecturalMsr.h
MSR_IA32_MC23_STATUS :
ArchitecturalMsr.h
MSR_IA32_MC24_ADDR :
ArchitecturalMsr.h
MSR_IA32_MC24_CTL :
ArchitecturalMsr.h
MSR_IA32_MC24_CTL2 :
ArchitecturalMsr.h
MSR_IA32_MC24_MISC :
ArchitecturalMsr.h
MSR_IA32_MC24_STATUS :
ArchitecturalMsr.h
MSR_IA32_MC25_ADDR :
ArchitecturalMsr.h
MSR_IA32_MC25_CTL :
ArchitecturalMsr.h
MSR_IA32_MC25_CTL2 :
ArchitecturalMsr.h
MSR_IA32_MC25_MISC :
ArchitecturalMsr.h
MSR_IA32_MC25_STATUS :
ArchitecturalMsr.h
MSR_IA32_MC26_ADDR :
ArchitecturalMsr.h
MSR_IA32_MC26_CTL :
ArchitecturalMsr.h
MSR_IA32_MC26_CTL2 :
ArchitecturalMsr.h
MSR_IA32_MC26_MISC :
ArchitecturalMsr.h
MSR_IA32_MC26_STATUS :
ArchitecturalMsr.h
MSR_IA32_MC27_ADDR :
ArchitecturalMsr.h
MSR_IA32_MC27_CTL :
ArchitecturalMsr.h
MSR_IA32_MC27_CTL2 :
ArchitecturalMsr.h
MSR_IA32_MC27_MISC :
ArchitecturalMsr.h
MSR_IA32_MC27_STATUS :
ArchitecturalMsr.h
MSR_IA32_MC28_ADDR :
ArchitecturalMsr.h
MSR_IA32_MC28_CTL :
ArchitecturalMsr.h
MSR_IA32_MC28_CTL2 :
ArchitecturalMsr.h
MSR_IA32_MC28_MISC :
ArchitecturalMsr.h
MSR_IA32_MC28_STATUS :
ArchitecturalMsr.h
MSR_IA32_MC29_CTL2 :
ArchitecturalMsr.h
MSR_IA32_MC2_ADDR :
ArchitecturalMsr.h
MSR_IA32_MC2_CTL :
ArchitecturalMsr.h
MSR_IA32_MC2_CTL2 :
ArchitecturalMsr.h
MSR_IA32_MC2_MISC :
ArchitecturalMsr.h
MSR_IA32_MC2_STATUS :
ArchitecturalMsr.h
MSR_IA32_MC30_CTL2 :
ArchitecturalMsr.h
MSR_IA32_MC31_CTL2 :
ArchitecturalMsr.h
MSR_IA32_MC3_ADDR :
ArchitecturalMsr.h
MSR_IA32_MC3_CTL :
ArchitecturalMsr.h
MSR_IA32_MC3_CTL2 :
ArchitecturalMsr.h
MSR_IA32_MC3_MISC :
ArchitecturalMsr.h
MSR_IA32_MC3_STATUS :
ArchitecturalMsr.h
MSR_IA32_MC4_ADDR :
ArchitecturalMsr.h
MSR_IA32_MC4_CTL :
ArchitecturalMsr.h
MSR_IA32_MC4_CTL2 :
ArchitecturalMsr.h
MSR_IA32_MC4_MISC :
ArchitecturalMsr.h
MSR_IA32_MC4_STATUS :
ArchitecturalMsr.h
MSR_IA32_MC5_ADDR :
ArchitecturalMsr.h
MSR_IA32_MC5_CTL :
ArchitecturalMsr.h
MSR_IA32_MC5_CTL2 :
ArchitecturalMsr.h
MSR_IA32_MC5_MISC :
ArchitecturalMsr.h
MSR_IA32_MC5_STATUS :
ArchitecturalMsr.h
MSR_IA32_MC6_ADDR :
ArchitecturalMsr.h
MSR_IA32_MC6_CTL :
ArchitecturalMsr.h
MSR_IA32_MC6_CTL2 :
ArchitecturalMsr.h
MSR_IA32_MC6_MISC :
ArchitecturalMsr.h
MSR_IA32_MC6_STATUS :
ArchitecturalMsr.h
MSR_IA32_MC7_ADDR :
ArchitecturalMsr.h
MSR_IA32_MC7_CTL :
ArchitecturalMsr.h
MSR_IA32_MC7_CTL2 :
ArchitecturalMsr.h
MSR_IA32_MC7_MISC :
ArchitecturalMsr.h
MSR_IA32_MC7_STATUS :
ArchitecturalMsr.h
MSR_IA32_MC8_ADDR :
ArchitecturalMsr.h
MSR_IA32_MC8_CTL :
ArchitecturalMsr.h
MSR_IA32_MC8_CTL2 :
ArchitecturalMsr.h
MSR_IA32_MC8_MISC :
ArchitecturalMsr.h
MSR_IA32_MC8_STATUS :
ArchitecturalMsr.h
MSR_IA32_MC9_ADDR :
ArchitecturalMsr.h
MSR_IA32_MC9_CTL :
ArchitecturalMsr.h
MSR_IA32_MC9_CTL2 :
ArchitecturalMsr.h
MSR_IA32_MC9_MISC :
ArchitecturalMsr.h
MSR_IA32_MC9_STATUS :
ArchitecturalMsr.h
MSR_IA32_MCG_CAP :
ArchitecturalMsr.h
MSR_IA32_MCG_CTL :
ArchitecturalMsr.h
MSR_IA32_MCG_EXT_CTL :
ArchitecturalMsr.h
MSR_IA32_MCG_STATUS :
ArchitecturalMsr.h
MSR_IA32_MISC_ENABLE :
ArchitecturalMsr.h
MSR_IA32_MONITOR_FILTER_SIZE :
ArchitecturalMsr.h
MSR_IA32_MPERF :
ArchitecturalMsr.h
MSR_IA32_MTRR_DEF_TYPE :
ArchitecturalMsr.h
MSR_IA32_MTRR_FIX16K_80000 :
ArchitecturalMsr.h
MSR_IA32_MTRR_FIX16K_A0000 :
ArchitecturalMsr.h
MSR_IA32_MTRR_FIX4K_C0000 :
ArchitecturalMsr.h
MSR_IA32_MTRR_FIX4K_C8000 :
ArchitecturalMsr.h
MSR_IA32_MTRR_FIX4K_D0000 :
ArchitecturalMsr.h
MSR_IA32_MTRR_FIX4K_D8000 :
ArchitecturalMsr.h
MSR_IA32_MTRR_FIX4K_E0000 :
ArchitecturalMsr.h
MSR_IA32_MTRR_FIX4K_E8000 :
ArchitecturalMsr.h
MSR_IA32_MTRR_FIX4K_F0000 :
ArchitecturalMsr.h
MSR_IA32_MTRR_FIX4K_F8000 :
ArchitecturalMsr.h
MSR_IA32_MTRR_FIX64K_00000 :
ArchitecturalMsr.h
MSR_IA32_MTRR_PHYSBASE0 :
ArchitecturalMsr.h
MSR_IA32_MTRR_PHYSBASE1 :
ArchitecturalMsr.h
MSR_IA32_MTRR_PHYSBASE2 :
ArchitecturalMsr.h
MSR_IA32_MTRR_PHYSBASE3 :
ArchitecturalMsr.h
MSR_IA32_MTRR_PHYSBASE4 :
ArchitecturalMsr.h
MSR_IA32_MTRR_PHYSBASE5 :
ArchitecturalMsr.h
MSR_IA32_MTRR_PHYSBASE6 :
ArchitecturalMsr.h
MSR_IA32_MTRR_PHYSBASE7 :
ArchitecturalMsr.h
MSR_IA32_MTRR_PHYSBASE8 :
ArchitecturalMsr.h
MSR_IA32_MTRR_PHYSBASE9 :
ArchitecturalMsr.h
MSR_IA32_MTRR_PHYSMASK0 :
ArchitecturalMsr.h
MSR_IA32_MTRR_PHYSMASK1 :
ArchitecturalMsr.h
MSR_IA32_MTRR_PHYSMASK2 :
ArchitecturalMsr.h
MSR_IA32_MTRR_PHYSMASK3 :
ArchitecturalMsr.h
MSR_IA32_MTRR_PHYSMASK4 :
ArchitecturalMsr.h
MSR_IA32_MTRR_PHYSMASK5 :
ArchitecturalMsr.h
MSR_IA32_MTRR_PHYSMASK6 :
ArchitecturalMsr.h
MSR_IA32_MTRR_PHYSMASK7 :
ArchitecturalMsr.h
MSR_IA32_MTRR_PHYSMASK8 :
ArchitecturalMsr.h
MSR_IA32_MTRR_PHYSMASK9 :
ArchitecturalMsr.h
MSR_IA32_MTRRCAP :
ArchitecturalMsr.h
MSR_IA32_P5_MC_ADDR :
ArchitecturalMsr.h
MSR_IA32_P5_MC_TYPE :
ArchitecturalMsr.h
MSR_IA32_PACKAGE_THERM_INTERRUPT :
ArchitecturalMsr.h
MSR_IA32_PACKAGE_THERM_STATUS :
ArchitecturalMsr.h
MSR_IA32_PAT :
ArchitecturalMsr.h
MSR_IA32_PEBS_ENABLE :
ArchitecturalMsr.h
MSR_IA32_PERF_CAPABILITIES :
ArchitecturalMsr.h
MSR_IA32_PERF_CTL :
ArchitecturalMsr.h
MSR_IA32_PERF_GLOBAL_CTRL :
ArchitecturalMsr.h
MSR_IA32_PERF_GLOBAL_INUSE :
ArchitecturalMsr.h
MSR_IA32_PERF_GLOBAL_OVF_CTRL :
ArchitecturalMsr.h
MSR_IA32_PERF_GLOBAL_STATUS :
ArchitecturalMsr.h
MSR_IA32_PERF_GLOBAL_STATUS_RESET :
ArchitecturalMsr.h
MSR_IA32_PERF_GLOBAL_STATUS_SET :
ArchitecturalMsr.h
MSR_IA32_PERF_STATUS :
ArchitecturalMsr.h
MSR_IA32_PERFEVTSEL0 :
ArchitecturalMsr.h
MSR_IA32_PERFEVTSEL1 :
ArchitecturalMsr.h
MSR_IA32_PERFEVTSEL2 :
ArchitecturalMsr.h
MSR_IA32_PERFEVTSEL3 :
ArchitecturalMsr.h
MSR_IA32_PKG_HDC_CTL :
ArchitecturalMsr.h
MSR_IA32_PLATFORM_DCA_CAP :
ArchitecturalMsr.h
MSR_IA32_PLATFORM_ID :
ArchitecturalMsr.h
MSR_IA32_PM_CTL1 :
ArchitecturalMsr.h
MSR_IA32_PM_ENABLE :
ArchitecturalMsr.h
MSR_IA32_PMC0 :
ArchitecturalMsr.h
MSR_IA32_PMC1 :
ArchitecturalMsr.h
MSR_IA32_PMC2 :
ArchitecturalMsr.h
MSR_IA32_PMC3 :
ArchitecturalMsr.h
MSR_IA32_PMC4 :
ArchitecturalMsr.h
MSR_IA32_PMC5 :
ArchitecturalMsr.h
MSR_IA32_PMC6 :
ArchitecturalMsr.h
MSR_IA32_PMC7 :
ArchitecturalMsr.h
MSR_IA32_PQR_ASSOC :
ArchitecturalMsr.h
MSR_IA32_QM_CTR :
ArchitecturalMsr.h
MSR_IA32_QM_EVTSEL :
ArchitecturalMsr.h
MSR_IA32_RTIT_ADDR0_A :
ArchitecturalMsr.h
MSR_IA32_RTIT_ADDR0_B :
ArchitecturalMsr.h
MSR_IA32_RTIT_ADDR1_A :
ArchitecturalMsr.h
MSR_IA32_RTIT_ADDR1_B :
ArchitecturalMsr.h
MSR_IA32_RTIT_ADDR2_A :
ArchitecturalMsr.h
MSR_IA32_RTIT_ADDR2_B :
ArchitecturalMsr.h
MSR_IA32_RTIT_ADDR3_A :
ArchitecturalMsr.h
MSR_IA32_RTIT_ADDR3_B :
ArchitecturalMsr.h
MSR_IA32_RTIT_CR3_MATCH :
ArchitecturalMsr.h
MSR_IA32_RTIT_CTL :
ArchitecturalMsr.h
,
GoldmontMsr.h
MSR_IA32_RTIT_OUTPUT_BASE :
ArchitecturalMsr.h
MSR_IA32_RTIT_OUTPUT_MASK_PTRS :
ArchitecturalMsr.h
MSR_IA32_RTIT_STATUS :
ArchitecturalMsr.h
MSR_IA32_SGX_SVN_STATUS :
ArchitecturalMsr.h
MSR_IA32_SGXLEPUBKEYHASH0 :
ArchitecturalMsr.h
MSR_IA32_SGXLEPUBKEYHASH1 :
ArchitecturalMsr.h
MSR_IA32_SGXLEPUBKEYHASH2 :
ArchitecturalMsr.h
MSR_IA32_SGXLEPUBKEYHASH3 :
ArchitecturalMsr.h
MSR_IA32_SMBASE :
ArchitecturalMsr.h
MSR_IA32_SMM_MONITOR_CTL :
ArchitecturalMsr.h
MSR_IA32_SMRR_PHYSBASE :
ArchitecturalMsr.h
MSR_IA32_SMRR_PHYSMASK :
ArchitecturalMsr.h
MSR_IA32_STAR :
ArchitecturalMsr.h
MSR_IA32_SYSENTER_CS :
ArchitecturalMsr.h
MSR_IA32_SYSENTER_EIP :
ArchitecturalMsr.h
MSR_IA32_SYSENTER_ESP :
ArchitecturalMsr.h
MSR_IA32_THERM_INTERRUPT :
ArchitecturalMsr.h
MSR_IA32_THERM_STATUS :
ArchitecturalMsr.h
MSR_IA32_THREAD_STALL :
ArchitecturalMsr.h
MSR_IA32_TIME_STAMP_COUNTER :
ArchitecturalMsr.h
MSR_IA32_TSC_ADJUST :
ArchitecturalMsr.h
MSR_IA32_TSC_AUX :
ArchitecturalMsr.h
MSR_IA32_TSC_DEADLINE :
ArchitecturalMsr.h
MSR_IA32_VMX_BASIC :
ArchitecturalMsr.h
MSR_IA32_VMX_BASIC_REGISTER_MEMORY_TYPE_UNCACHEABLE :
ArchitecturalMsr.h
MSR_IA32_VMX_BASIC_REGISTER_MEMORY_TYPE_WRITE_BACK :
ArchitecturalMsr.h
MSR_IA32_VMX_CR0_FIXED0 :
ArchitecturalMsr.h
MSR_IA32_VMX_CR0_FIXED1 :
ArchitecturalMsr.h
MSR_IA32_VMX_CR4_FIXED0 :
ArchitecturalMsr.h
MSR_IA32_VMX_CR4_FIXED1 :
ArchitecturalMsr.h
MSR_IA32_VMX_ENTRY_CTLS :
ArchitecturalMsr.h
MSR_IA32_VMX_EPT_VPID_CAP :
ArchitecturalMsr.h
MSR_IA32_VMX_EXIT_CTLS :
ArchitecturalMsr.h
MSR_IA32_VMX_MISC :
ArchitecturalMsr.h
MSR_IA32_VMX_PINBASED_CTLS :
ArchitecturalMsr.h
MSR_IA32_VMX_PROCBASED_CTLS :
ArchitecturalMsr.h
MSR_IA32_VMX_PROCBASED_CTLS2 :
ArchitecturalMsr.h
MSR_IA32_VMX_TRUE_ENTRY_CTLS :
ArchitecturalMsr.h
MSR_IA32_VMX_TRUE_EXIT_CTLS :
ArchitecturalMsr.h
MSR_IA32_VMX_TRUE_PINBASED_CTLS :
ArchitecturalMsr.h
MSR_IA32_VMX_TRUE_PROCBASED_CTLS :
ArchitecturalMsr.h
MSR_IA32_VMX_VMCS_ENUM :
ArchitecturalMsr.h
MSR_IA32_VMX_VMFUNC :
ArchitecturalMsr.h
MSR_IA32_X2APIC_APICID :
ArchitecturalMsr.h
MSR_IA32_X2APIC_CUR_COUNT :
ArchitecturalMsr.h
MSR_IA32_X2APIC_DIV_CONF :
ArchitecturalMsr.h
MSR_IA32_X2APIC_EOI :
ArchitecturalMsr.h
MSR_IA32_X2APIC_ESR :
ArchitecturalMsr.h
MSR_IA32_X2APIC_ICR :
ArchitecturalMsr.h
MSR_IA32_X2APIC_INIT_COUNT :
ArchitecturalMsr.h
MSR_IA32_X2APIC_IRR0 :
ArchitecturalMsr.h
MSR_IA32_X2APIC_IRR1 :
ArchitecturalMsr.h
MSR_IA32_X2APIC_IRR2 :
ArchitecturalMsr.h
MSR_IA32_X2APIC_IRR3 :
ArchitecturalMsr.h
MSR_IA32_X2APIC_IRR4 :
ArchitecturalMsr.h
MSR_IA32_X2APIC_IRR5 :
ArchitecturalMsr.h
MSR_IA32_X2APIC_IRR6 :
ArchitecturalMsr.h
MSR_IA32_X2APIC_IRR7 :
ArchitecturalMsr.h
MSR_IA32_X2APIC_ISR0 :
ArchitecturalMsr.h
MSR_IA32_X2APIC_ISR1 :
ArchitecturalMsr.h
MSR_IA32_X2APIC_ISR2 :
ArchitecturalMsr.h
MSR_IA32_X2APIC_ISR3 :
ArchitecturalMsr.h
MSR_IA32_X2APIC_ISR4 :
ArchitecturalMsr.h
MSR_IA32_X2APIC_ISR5 :
ArchitecturalMsr.h
MSR_IA32_X2APIC_ISR6 :
ArchitecturalMsr.h
MSR_IA32_X2APIC_ISR7 :
ArchitecturalMsr.h
MSR_IA32_X2APIC_LDR :
ArchitecturalMsr.h
MSR_IA32_X2APIC_LVT_CMCI :
ArchitecturalMsr.h
MSR_IA32_X2APIC_LVT_ERROR :
ArchitecturalMsr.h
MSR_IA32_X2APIC_LVT_LINT0 :
ArchitecturalMsr.h
MSR_IA32_X2APIC_LVT_LINT1 :
ArchitecturalMsr.h
MSR_IA32_X2APIC_LVT_PMI :
ArchitecturalMsr.h
MSR_IA32_X2APIC_LVT_THERMAL :
ArchitecturalMsr.h
MSR_IA32_X2APIC_LVT_TIMER :
ArchitecturalMsr.h
MSR_IA32_X2APIC_PPR :
ArchitecturalMsr.h
MSR_IA32_X2APIC_SELF_IPI :
ArchitecturalMsr.h
MSR_IA32_X2APIC_SIVR :
ArchitecturalMsr.h
MSR_IA32_X2APIC_TMR0 :
ArchitecturalMsr.h
MSR_IA32_X2APIC_TMR1 :
ArchitecturalMsr.h
MSR_IA32_X2APIC_TMR2 :
ArchitecturalMsr.h
MSR_IA32_X2APIC_TMR3 :
ArchitecturalMsr.h
MSR_IA32_X2APIC_TMR4 :
ArchitecturalMsr.h
MSR_IA32_X2APIC_TMR5 :
ArchitecturalMsr.h
MSR_IA32_X2APIC_TMR6 :
ArchitecturalMsr.h
MSR_IA32_X2APIC_TMR7 :
ArchitecturalMsr.h
MSR_IA32_X2APIC_TPR :
ArchitecturalMsr.h
MSR_IA32_X2APIC_VERSION :
ArchitecturalMsr.h
MSR_IA32_XSS :
ArchitecturalMsr.h
MSR_IVY_BRIDGE_C0_PMON_BOX_FILTER1 :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_C10_PMON_BOX_CTL :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_C10_PMON_BOX_FILTER :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_C10_PMON_BOX_FILTER1 :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_C10_PMON_CTR0 :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_C10_PMON_CTR1 :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_C10_PMON_CTR2 :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_C10_PMON_CTR3 :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_C10_PMON_EVNTSEL0 :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_C10_PMON_EVNTSEL1 :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_C10_PMON_EVNTSEL2 :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_C10_PMON_EVNTSEL3 :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_C11_PMON_BOX_CTL :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_C11_PMON_BOX_FILTER :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_C11_PMON_BOX_FILTER1 :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_C11_PMON_CTR0 :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_C11_PMON_CTR1 :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_C11_PMON_CTR2 :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_C11_PMON_CTR3 :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_C11_PMON_EVNTSEL0 :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_C11_PMON_EVNTSEL1 :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_C11_PMON_EVNTSEL2 :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_C11_PMON_EVNTSEL3 :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_C12_PMON_BOX_CTL :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_C12_PMON_BOX_FILTER :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_C12_PMON_BOX_FILTER1 :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_C12_PMON_CTR0 :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_C12_PMON_CTR1 :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_C12_PMON_CTR2 :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_C12_PMON_CTR3 :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_C12_PMON_EVNTSEL0 :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_C12_PMON_EVNTSEL1 :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_C12_PMON_EVNTSEL2 :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_C12_PMON_EVNTSEL3 :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_C13_PMON_BOX_CTL :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_C13_PMON_BOX_FILTER :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_C13_PMON_BOX_FILTER1 :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_C13_PMON_CTR0 :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_C13_PMON_CTR1 :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_C13_PMON_CTR2 :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_C13_PMON_CTR3 :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_C13_PMON_EVNTSEL0 :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_C13_PMON_EVNTSEL1 :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_C13_PMON_EVNTSEL2 :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_C13_PMON_EVNTSEL3 :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_C14_PMON_BOX_CTL :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_C14_PMON_BOX_FILTER :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_C14_PMON_BOX_FILTER1 :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_C14_PMON_CTR0 :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_C14_PMON_CTR1 :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_C14_PMON_CTR2 :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_C14_PMON_CTR3 :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_C14_PMON_EVNTSEL0 :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_C14_PMON_EVNTSEL1 :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_C14_PMON_EVNTSEL2 :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_C14_PMON_EVNTSEL3 :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_C1_PMON_BOX_FILTER1 :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_C2_PMON_BOX_FILTER1 :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_C3_PMON_BOX_FILTER1 :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_C4_PMON_BOX_FILTER1 :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_C5_PMON_BOX_FILTER1 :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_C6_PMON_BOX_FILTER1 :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_C7_PMON_BOX_FILTER1 :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_C8_PMON_BOX_CTL :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_C8_PMON_BOX_FILTER :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_C8_PMON_BOX_FILTER1 :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_C8_PMON_CTR0 :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_C8_PMON_CTR1 :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_C8_PMON_CTR2 :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_C8_PMON_CTR3 :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_C8_PMON_EVNTSEL0 :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_C8_PMON_EVNTSEL1 :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_C8_PMON_EVNTSEL2 :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_C8_PMON_EVNTSEL3 :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_C9_PMON_BOX_CTL :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_C9_PMON_BOX_FILTER :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_C9_PMON_BOX_FILTER1 :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_C9_PMON_CTR0 :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_C9_PMON_CTR1 :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_C9_PMON_CTR2 :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_C9_PMON_CTR3 :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_C9_PMON_EVNTSEL0 :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_C9_PMON_EVNTSEL1 :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_C9_PMON_EVNTSEL2 :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_C9_PMON_EVNTSEL3 :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_CONFIG_TDP_CONTROL :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_CONFIG_TDP_LEVEL1 :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_CONFIG_TDP_LEVEL2 :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_CONFIG_TDP_NOMINAL :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_DRAM_ENERGY_STATUS :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_DRAM_PERF_STATUS :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_DRAM_POWER_INFO :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_DRAM_POWER_LIMIT :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_ERROR_CONTROL :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_IA32_MC29_ADDR :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_IA32_MC29_CTL :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_IA32_MC29_MISC :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_IA32_MC29_STATUS :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_IA32_MC30_ADDR :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_IA32_MC30_CTL :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_IA32_MC30_MISC :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_IA32_MC30_STATUS :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_IA32_MC31_ADDR :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_IA32_MC31_CTL :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_IA32_MC31_MISC :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_IA32_MC31_STATUS :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_IA32_MC6_MISC :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_PCU_PMON_BOX_STATUS :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_PEBS_ENABLE :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_PKG_CST_CONFIG_CONTROL :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_PKG_PERF_STATUS :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_PLATFORM_INFO :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_PLATFORM_INFO_1 :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_PMON_GLOBAL_CONFIG :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_PMON_GLOBAL_CTL :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_PMON_GLOBAL_STATUS :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_PP0_ENERGY_STATUS :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_PPIN :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_PPIN_CTL :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_TEMPERATURE_TARGET :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_TURBO_ACTIVATION_RATIO :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_TURBO_RATIO_LIMIT1 :
IvyBridgeMsr.h
MSR_IVY_BRIDGE_U_PMON_BOX_STATUS :
IvyBridgeMsr.h
MSR_NEHALEM_B0_PMON_BOX_CTRL :
NehalemMsr.h
MSR_NEHALEM_B0_PMON_BOX_OVF_CTRL :
NehalemMsr.h
MSR_NEHALEM_B0_PMON_BOX_STATUS :
NehalemMsr.h
MSR_NEHALEM_B0_PMON_CTR0 :
NehalemMsr.h
MSR_NEHALEM_B0_PMON_CTR1 :
NehalemMsr.h
MSR_NEHALEM_B0_PMON_CTR2 :
NehalemMsr.h
MSR_NEHALEM_B0_PMON_CTR3 :
NehalemMsr.h
MSR_NEHALEM_B0_PMON_EVNT_SEL0 :
NehalemMsr.h
MSR_NEHALEM_B0_PMON_EVNT_SEL1 :
NehalemMsr.h
MSR_NEHALEM_B0_PMON_EVNT_SEL2 :
NehalemMsr.h
MSR_NEHALEM_B0_PMON_EVNT_SEL3 :
NehalemMsr.h
MSR_NEHALEM_B0_PMON_MASK :
NehalemMsr.h
MSR_NEHALEM_B0_PMON_MATCH :
NehalemMsr.h
MSR_NEHALEM_B1_PMON_BOX_CTRL :
NehalemMsr.h
MSR_NEHALEM_B1_PMON_BOX_OVF_CTRL :
NehalemMsr.h
MSR_NEHALEM_B1_PMON_BOX_STATUS :
NehalemMsr.h
MSR_NEHALEM_B1_PMON_CTR0 :
NehalemMsr.h
MSR_NEHALEM_B1_PMON_CTR1 :
NehalemMsr.h
MSR_NEHALEM_B1_PMON_CTR2 :
NehalemMsr.h
MSR_NEHALEM_B1_PMON_CTR3 :
NehalemMsr.h
MSR_NEHALEM_B1_PMON_EVNT_SEL0 :
NehalemMsr.h
MSR_NEHALEM_B1_PMON_EVNT_SEL1 :
NehalemMsr.h
MSR_NEHALEM_B1_PMON_EVNT_SEL2 :
NehalemMsr.h
MSR_NEHALEM_B1_PMON_EVNT_SEL3 :
NehalemMsr.h
MSR_NEHALEM_B1_PMON_MASK :
NehalemMsr.h
MSR_NEHALEM_B1_PMON_MATCH :
NehalemMsr.h
MSR_NEHALEM_C0_PMON_BOX_CTRL :
NehalemMsr.h
MSR_NEHALEM_C0_PMON_BOX_OVF_CTRL :
NehalemMsr.h
MSR_NEHALEM_C0_PMON_BOX_STATUS :
NehalemMsr.h
MSR_NEHALEM_C0_PMON_CTR0 :
NehalemMsr.h
MSR_NEHALEM_C0_PMON_CTR1 :
NehalemMsr.h
MSR_NEHALEM_C0_PMON_CTR2 :
NehalemMsr.h
MSR_NEHALEM_C0_PMON_CTR3 :
NehalemMsr.h
MSR_NEHALEM_C0_PMON_CTR4 :
NehalemMsr.h
MSR_NEHALEM_C0_PMON_CTR5 :
NehalemMsr.h
MSR_NEHALEM_C0_PMON_EVNT_SEL0 :
NehalemMsr.h
MSR_NEHALEM_C0_PMON_EVNT_SEL1 :
NehalemMsr.h
MSR_NEHALEM_C0_PMON_EVNT_SEL2 :
NehalemMsr.h
MSR_NEHALEM_C0_PMON_EVNT_SEL3 :
NehalemMsr.h
MSR_NEHALEM_C0_PMON_EVNT_SEL4 :
NehalemMsr.h
MSR_NEHALEM_C0_PMON_EVNT_SEL5 :
NehalemMsr.h
MSR_NEHALEM_C1_PMON_BOX_CTRL :
NehalemMsr.h
MSR_NEHALEM_C1_PMON_BOX_OVF_CTRL :
NehalemMsr.h
MSR_NEHALEM_C1_PMON_BOX_STATUS :
NehalemMsr.h
MSR_NEHALEM_C1_PMON_CTR0 :
NehalemMsr.h
MSR_NEHALEM_C1_PMON_CTR1 :
NehalemMsr.h
MSR_NEHALEM_C1_PMON_CTR2 :
NehalemMsr.h
MSR_NEHALEM_C1_PMON_CTR3 :
NehalemMsr.h
MSR_NEHALEM_C1_PMON_CTR4 :
NehalemMsr.h
MSR_NEHALEM_C1_PMON_CTR5 :
NehalemMsr.h
MSR_NEHALEM_C1_PMON_EVNT_SEL0 :
NehalemMsr.h
MSR_NEHALEM_C1_PMON_EVNT_SEL1 :
NehalemMsr.h
MSR_NEHALEM_C1_PMON_EVNT_SEL2 :
NehalemMsr.h
MSR_NEHALEM_C1_PMON_EVNT_SEL3 :
NehalemMsr.h
MSR_NEHALEM_C1_PMON_EVNT_SEL4 :
NehalemMsr.h
MSR_NEHALEM_C1_PMON_EVNT_SEL5 :
NehalemMsr.h
MSR_NEHALEM_C2_PMON_BOX_CTRL :
NehalemMsr.h
MSR_NEHALEM_C2_PMON_BOX_OVF_CTRL :
NehalemMsr.h
MSR_NEHALEM_C2_PMON_BOX_STATUS :
NehalemMsr.h
MSR_NEHALEM_C2_PMON_CTR0 :
NehalemMsr.h
MSR_NEHALEM_C2_PMON_CTR1 :
NehalemMsr.h
MSR_NEHALEM_C2_PMON_CTR2 :
NehalemMsr.h
MSR_NEHALEM_C2_PMON_CTR3 :
NehalemMsr.h
MSR_NEHALEM_C2_PMON_CTR4 :
NehalemMsr.h
MSR_NEHALEM_C2_PMON_CTR5 :
NehalemMsr.h
MSR_NEHALEM_C2_PMON_EVNT_SEL0 :
NehalemMsr.h
MSR_NEHALEM_C2_PMON_EVNT_SEL1 :
NehalemMsr.h
MSR_NEHALEM_C2_PMON_EVNT_SEL2 :
NehalemMsr.h
MSR_NEHALEM_C2_PMON_EVNT_SEL3 :
NehalemMsr.h
MSR_NEHALEM_C2_PMON_EVNT_SEL4 :
NehalemMsr.h
MSR_NEHALEM_C2_PMON_EVNT_SEL5 :
NehalemMsr.h
MSR_NEHALEM_C3_PMON_BOX_CTRL :
NehalemMsr.h
MSR_NEHALEM_C3_PMON_BOX_OVF_CTRL :
NehalemMsr.h
MSR_NEHALEM_C3_PMON_BOX_STATUS :
NehalemMsr.h
MSR_NEHALEM_C3_PMON_CTR0 :
NehalemMsr.h
MSR_NEHALEM_C3_PMON_CTR1 :
NehalemMsr.h
MSR_NEHALEM_C3_PMON_CTR2 :
NehalemMsr.h
MSR_NEHALEM_C3_PMON_CTR3 :
NehalemMsr.h
MSR_NEHALEM_C3_PMON_CTR4 :
NehalemMsr.h
MSR_NEHALEM_C3_PMON_CTR5 :
NehalemMsr.h
MSR_NEHALEM_C3_PMON_EVNT_SEL0 :
NehalemMsr.h
MSR_NEHALEM_C3_PMON_EVNT_SEL1 :
NehalemMsr.h
MSR_NEHALEM_C3_PMON_EVNT_SEL2 :
NehalemMsr.h
MSR_NEHALEM_C3_PMON_EVNT_SEL3 :
NehalemMsr.h
MSR_NEHALEM_C3_PMON_EVNT_SEL4 :
NehalemMsr.h
MSR_NEHALEM_C3_PMON_EVNT_SEL5 :
NehalemMsr.h
MSR_NEHALEM_C4_PMON_BOX_CTRL :
NehalemMsr.h
MSR_NEHALEM_C4_PMON_BOX_OVF_CTRL :
NehalemMsr.h
MSR_NEHALEM_C4_PMON_BOX_STATUS :
NehalemMsr.h
MSR_NEHALEM_C4_PMON_CTR0 :
NehalemMsr.h
MSR_NEHALEM_C4_PMON_CTR1 :
NehalemMsr.h
MSR_NEHALEM_C4_PMON_CTR2 :
NehalemMsr.h
MSR_NEHALEM_C4_PMON_CTR3 :
NehalemMsr.h
MSR_NEHALEM_C4_PMON_CTR4 :
NehalemMsr.h
MSR_NEHALEM_C4_PMON_CTR5 :
NehalemMsr.h
MSR_NEHALEM_C4_PMON_EVNT_SEL0 :
NehalemMsr.h
MSR_NEHALEM_C4_PMON_EVNT_SEL1 :
NehalemMsr.h
MSR_NEHALEM_C4_PMON_EVNT_SEL2 :
NehalemMsr.h
MSR_NEHALEM_C4_PMON_EVNT_SEL3 :
NehalemMsr.h
MSR_NEHALEM_C4_PMON_EVNT_SEL4 :
NehalemMsr.h
MSR_NEHALEM_C4_PMON_EVNT_SEL5 :
NehalemMsr.h
MSR_NEHALEM_C5_PMON_BOX_CTRL :
NehalemMsr.h
MSR_NEHALEM_C5_PMON_BOX_OVF_CTRL :
NehalemMsr.h
MSR_NEHALEM_C5_PMON_BOX_STATUS :
NehalemMsr.h
MSR_NEHALEM_C5_PMON_CTR0 :
NehalemMsr.h
MSR_NEHALEM_C5_PMON_CTR1 :
NehalemMsr.h
MSR_NEHALEM_C5_PMON_CTR2 :
NehalemMsr.h
MSR_NEHALEM_C5_PMON_CTR3 :
NehalemMsr.h
MSR_NEHALEM_C5_PMON_CTR4 :
NehalemMsr.h
MSR_NEHALEM_C5_PMON_CTR5 :
NehalemMsr.h
MSR_NEHALEM_C5_PMON_EVNT_SEL0 :
NehalemMsr.h
MSR_NEHALEM_C5_PMON_EVNT_SEL1 :
NehalemMsr.h
MSR_NEHALEM_C5_PMON_EVNT_SEL2 :
NehalemMsr.h
MSR_NEHALEM_C5_PMON_EVNT_SEL3 :
NehalemMsr.h
MSR_NEHALEM_C5_PMON_EVNT_SEL4 :
NehalemMsr.h
MSR_NEHALEM_C5_PMON_EVNT_SEL5 :
NehalemMsr.h
MSR_NEHALEM_C6_PMON_BOX_CTRL :
NehalemMsr.h
MSR_NEHALEM_C6_PMON_BOX_OVF_CTRL :
NehalemMsr.h
MSR_NEHALEM_C6_PMON_BOX_STATUS :
NehalemMsr.h
MSR_NEHALEM_C6_PMON_CTR0 :
NehalemMsr.h
MSR_NEHALEM_C6_PMON_CTR1 :
NehalemMsr.h
MSR_NEHALEM_C6_PMON_CTR2 :
NehalemMsr.h
MSR_NEHALEM_C6_PMON_CTR3 :
NehalemMsr.h
MSR_NEHALEM_C6_PMON_CTR4 :
NehalemMsr.h
MSR_NEHALEM_C6_PMON_CTR5 :
NehalemMsr.h
MSR_NEHALEM_C6_PMON_EVNT_SEL0 :
NehalemMsr.h
MSR_NEHALEM_C6_PMON_EVNT_SEL1 :
NehalemMsr.h
MSR_NEHALEM_C6_PMON_EVNT_SEL2 :
NehalemMsr.h
MSR_NEHALEM_C6_PMON_EVNT_SEL3 :
NehalemMsr.h
MSR_NEHALEM_C6_PMON_EVNT_SEL4 :
NehalemMsr.h
MSR_NEHALEM_C6_PMON_EVNT_SEL5 :
NehalemMsr.h
MSR_NEHALEM_C7_PMON_BOX_CTRL :
NehalemMsr.h
MSR_NEHALEM_C7_PMON_BOX_OVF_CTRL :
NehalemMsr.h
MSR_NEHALEM_C7_PMON_BOX_STATUS :
NehalemMsr.h
MSR_NEHALEM_C7_PMON_CTR0 :
NehalemMsr.h
MSR_NEHALEM_C7_PMON_CTR1 :
NehalemMsr.h
MSR_NEHALEM_C7_PMON_CTR2 :
NehalemMsr.h
MSR_NEHALEM_C7_PMON_CTR3 :
NehalemMsr.h
MSR_NEHALEM_C7_PMON_CTR4 :
NehalemMsr.h
MSR_NEHALEM_C7_PMON_CTR5 :
NehalemMsr.h
MSR_NEHALEM_C7_PMON_EVNT_SEL0 :
NehalemMsr.h
MSR_NEHALEM_C7_PMON_EVNT_SEL1 :
NehalemMsr.h
MSR_NEHALEM_C7_PMON_EVNT_SEL2 :
NehalemMsr.h
MSR_NEHALEM_C7_PMON_EVNT_SEL3 :
NehalemMsr.h
MSR_NEHALEM_C7_PMON_EVNT_SEL4 :
NehalemMsr.h
MSR_NEHALEM_C7_PMON_EVNT_SEL5 :
NehalemMsr.h
MSR_NEHALEM_CORE_C3_RESIDENCY :
NehalemMsr.h
MSR_NEHALEM_CORE_C6_RESIDENCY :
NehalemMsr.h
MSR_NEHALEM_GQ_SNOOP_MESF :
NehalemMsr.h
MSR_NEHALEM_IA32_MISC_ENABLE :
NehalemMsr.h
MSR_NEHALEM_LASTBRANCH_0_FROM_IP :
NehalemMsr.h
MSR_NEHALEM_LASTBRANCH_0_TO_IP :
NehalemMsr.h
MSR_NEHALEM_LASTBRANCH_10_FROM_IP :
NehalemMsr.h
MSR_NEHALEM_LASTBRANCH_10_TO_IP :
NehalemMsr.h
MSR_NEHALEM_LASTBRANCH_11_FROM_IP :
NehalemMsr.h
MSR_NEHALEM_LASTBRANCH_11_TO_IP :
NehalemMsr.h
MSR_NEHALEM_LASTBRANCH_12_FROM_IP :
NehalemMsr.h
MSR_NEHALEM_LASTBRANCH_12_TO_IP :
NehalemMsr.h
MSR_NEHALEM_LASTBRANCH_13_FROM_IP :
NehalemMsr.h
MSR_NEHALEM_LASTBRANCH_13_TO_IP :
NehalemMsr.h
MSR_NEHALEM_LASTBRANCH_14_FROM_IP :
NehalemMsr.h
MSR_NEHALEM_LASTBRANCH_14_TO_IP :
NehalemMsr.h
MSR_NEHALEM_LASTBRANCH_15_FROM_IP :
NehalemMsr.h
MSR_NEHALEM_LASTBRANCH_15_TO_IP :
NehalemMsr.h
MSR_NEHALEM_LASTBRANCH_1_FROM_IP :
NehalemMsr.h
MSR_NEHALEM_LASTBRANCH_1_TO_IP :
NehalemMsr.h
MSR_NEHALEM_LASTBRANCH_2_FROM_IP :
NehalemMsr.h
MSR_NEHALEM_LASTBRANCH_2_TO_IP :
NehalemMsr.h
MSR_NEHALEM_LASTBRANCH_3_FROM_IP :
NehalemMsr.h
MSR_NEHALEM_LASTBRANCH_3_TO_IP :
NehalemMsr.h
MSR_NEHALEM_LASTBRANCH_4_FROM_IP :
NehalemMsr.h
MSR_NEHALEM_LASTBRANCH_4_TO_IP :
NehalemMsr.h
MSR_NEHALEM_LASTBRANCH_5_FROM_IP :
NehalemMsr.h
MSR_NEHALEM_LASTBRANCH_5_TO_IP :
NehalemMsr.h
MSR_NEHALEM_LASTBRANCH_6_FROM_IP :
NehalemMsr.h
MSR_NEHALEM_LASTBRANCH_6_TO_IP :
NehalemMsr.h
MSR_NEHALEM_LASTBRANCH_7_FROM_IP :
NehalemMsr.h
MSR_NEHALEM_LASTBRANCH_7_TO_IP :
NehalemMsr.h
MSR_NEHALEM_LASTBRANCH_8_FROM_IP :
NehalemMsr.h
MSR_NEHALEM_LASTBRANCH_8_TO_IP :
NehalemMsr.h
MSR_NEHALEM_LASTBRANCH_9_FROM_IP :
NehalemMsr.h
MSR_NEHALEM_LASTBRANCH_9_TO_IP :
NehalemMsr.h
MSR_NEHALEM_LASTBRANCH_TOS :
NehalemMsr.h
MSR_NEHALEM_LBR_SELECT :
NehalemMsr.h
MSR_NEHALEM_LER_FROM_LIP :
NehalemMsr.h
MSR_NEHALEM_LER_TO_LIP :
NehalemMsr.h
MSR_NEHALEM_M0_PMON_ADDR_MASK :
NehalemMsr.h
MSR_NEHALEM_M0_PMON_ADDR_MATCH :
NehalemMsr.h
MSR_NEHALEM_M0_PMON_BOX_CTRL :
NehalemMsr.h
MSR_NEHALEM_M0_PMON_BOX_OVF_CTRL :
NehalemMsr.h
MSR_NEHALEM_M0_PMON_BOX_STATUS :
NehalemMsr.h
MSR_NEHALEM_M0_PMON_CTR0 :
NehalemMsr.h
MSR_NEHALEM_M0_PMON_CTR1 :
NehalemMsr.h
MSR_NEHALEM_M0_PMON_CTR2 :
NehalemMsr.h
MSR_NEHALEM_M0_PMON_CTR3 :
NehalemMsr.h
MSR_NEHALEM_M0_PMON_CTR4 :
NehalemMsr.h
MSR_NEHALEM_M0_PMON_CTR5 :
NehalemMsr.h
MSR_NEHALEM_M0_PMON_DSP :
NehalemMsr.h
MSR_NEHALEM_M0_PMON_EVNT_SEL0 :
NehalemMsr.h
MSR_NEHALEM_M0_PMON_EVNT_SEL1 :
NehalemMsr.h
MSR_NEHALEM_M0_PMON_EVNT_SEL2 :
NehalemMsr.h
MSR_NEHALEM_M0_PMON_EVNT_SEL3 :
NehalemMsr.h
MSR_NEHALEM_M0_PMON_EVNT_SEL4 :
NehalemMsr.h
MSR_NEHALEM_M0_PMON_EVNT_SEL5 :
NehalemMsr.h
MSR_NEHALEM_M0_PMON_ISS :
NehalemMsr.h
MSR_NEHALEM_M0_PMON_MAP :
NehalemMsr.h
MSR_NEHALEM_M0_PMON_MM_CONFIG :
NehalemMsr.h
MSR_NEHALEM_M0_PMON_MSC_THR :
NehalemMsr.h
MSR_NEHALEM_M0_PMON_PGT :
NehalemMsr.h
MSR_NEHALEM_M0_PMON_PLD :
NehalemMsr.h
MSR_NEHALEM_M0_PMON_TIMESTAMP :
NehalemMsr.h
MSR_NEHALEM_M0_PMON_ZDP :
NehalemMsr.h
MSR_NEHALEM_M1_PMON_ADDR_MASK :
NehalemMsr.h
MSR_NEHALEM_M1_PMON_ADDR_MATCH :
NehalemMsr.h
MSR_NEHALEM_M1_PMON_BOX_CTRL :
NehalemMsr.h
MSR_NEHALEM_M1_PMON_BOX_OVF_CTRL :
NehalemMsr.h
MSR_NEHALEM_M1_PMON_BOX_STATUS :
NehalemMsr.h
MSR_NEHALEM_M1_PMON_CTR0 :
NehalemMsr.h
MSR_NEHALEM_M1_PMON_CTR1 :
NehalemMsr.h
MSR_NEHALEM_M1_PMON_CTR2 :
NehalemMsr.h
MSR_NEHALEM_M1_PMON_CTR3 :
NehalemMsr.h
MSR_NEHALEM_M1_PMON_CTR4 :
NehalemMsr.h
MSR_NEHALEM_M1_PMON_CTR5 :
NehalemMsr.h
MSR_NEHALEM_M1_PMON_DSP :
NehalemMsr.h
MSR_NEHALEM_M1_PMON_EVNT_SEL0 :
NehalemMsr.h
MSR_NEHALEM_M1_PMON_EVNT_SEL1 :
NehalemMsr.h
MSR_NEHALEM_M1_PMON_EVNT_SEL2 :
NehalemMsr.h
MSR_NEHALEM_M1_PMON_EVNT_SEL3 :
NehalemMsr.h
MSR_NEHALEM_M1_PMON_EVNT_SEL4 :
NehalemMsr.h
MSR_NEHALEM_M1_PMON_EVNT_SEL5 :
NehalemMsr.h
MSR_NEHALEM_M1_PMON_ISS :
NehalemMsr.h
MSR_NEHALEM_M1_PMON_MAP :
NehalemMsr.h
MSR_NEHALEM_M1_PMON_MM_CONFIG :
NehalemMsr.h
MSR_NEHALEM_M1_PMON_MSC_THR :
NehalemMsr.h
MSR_NEHALEM_M1_PMON_PGT :
NehalemMsr.h
MSR_NEHALEM_M1_PMON_PLD :
NehalemMsr.h
MSR_NEHALEM_M1_PMON_TIMESTAMP :
NehalemMsr.h
MSR_NEHALEM_M1_PMON_ZDP :
NehalemMsr.h
MSR_NEHALEM_MISC_FEATURE_CONTROL :
NehalemMsr.h
MSR_NEHALEM_MISC_PWR_MGMT :
NehalemMsr.h
MSR_NEHALEM_OFFCORE_RSP_0 :
NehalemMsr.h
MSR_NEHALEM_PEBS_ENABLE :
NehalemMsr.h
MSR_NEHALEM_PEBS_LD_LAT :
NehalemMsr.h
MSR_NEHALEM_PERF_GLOBAL_OVF_CTRL :
NehalemMsr.h
MSR_NEHALEM_PERF_GLOBAL_STATUS :
NehalemMsr.h
MSR_NEHALEM_PKG_C3_RESIDENCY :
NehalemMsr.h
MSR_NEHALEM_PKG_C6_RESIDENCY :
NehalemMsr.h
MSR_NEHALEM_PKG_C7_RESIDENCY :
NehalemMsr.h
MSR_NEHALEM_PKG_CST_CONFIG_CONTROL :
NehalemMsr.h
MSR_NEHALEM_PLATFORM_ID :
NehalemMsr.h
MSR_NEHALEM_PLATFORM_INFO :
NehalemMsr.h
MSR_NEHALEM_PMG_IO_CAPTURE_BASE :
NehalemMsr.h
MSR_NEHALEM_POWER_CTL :
NehalemMsr.h
MSR_NEHALEM_R0_PMON_BOX_CTRL :
NehalemMsr.h
MSR_NEHALEM_R0_PMON_BOX_OVF_CTRL :
NehalemMsr.h
MSR_NEHALEM_R0_PMON_BOX_STATUS :
NehalemMsr.h
MSR_NEHALEM_R0_PMON_CTR0 :
NehalemMsr.h
MSR_NEHALEM_R0_PMON_CTR1 :
NehalemMsr.h
MSR_NEHALEM_R0_PMON_CTR2 :
NehalemMsr.h
MSR_NEHALEM_R0_PMON_CTR3 :
NehalemMsr.h
MSR_NEHALEM_R0_PMON_CTR4 :
NehalemMsr.h
MSR_NEHALEM_R0_PMON_CTR5 :
NehalemMsr.h
MSR_NEHALEM_R0_PMON_CTR6 :
NehalemMsr.h
MSR_NEHALEM_R0_PMON_CTR7 :
NehalemMsr.h
MSR_NEHALEM_R0_PMON_EVNT_SEL0 :
NehalemMsr.h
MSR_NEHALEM_R0_PMON_EVNT_SEL1 :
NehalemMsr.h
MSR_NEHALEM_R0_PMON_EVNT_SEL2 :
NehalemMsr.h
MSR_NEHALEM_R0_PMON_EVNT_SEL3 :
NehalemMsr.h
MSR_NEHALEM_R0_PMON_EVNT_SEL4 :
NehalemMsr.h
MSR_NEHALEM_R0_PMON_EVNT_SEL5 :
NehalemMsr.h
MSR_NEHALEM_R0_PMON_EVNT_SEL6 :
NehalemMsr.h
MSR_NEHALEM_R0_PMON_EVNT_SEL7 :
NehalemMsr.h
MSR_NEHALEM_R0_PMON_IPERF0_P0 :
NehalemMsr.h
MSR_NEHALEM_R0_PMON_IPERF0_P1 :
NehalemMsr.h
MSR_NEHALEM_R0_PMON_IPERF0_P2 :
NehalemMsr.h
MSR_NEHALEM_R0_PMON_IPERF0_P3 :
NehalemMsr.h
MSR_NEHALEM_R0_PMON_IPERF0_P4 :
NehalemMsr.h
MSR_NEHALEM_R0_PMON_IPERF0_P5 :
NehalemMsr.h
MSR_NEHALEM_R0_PMON_IPERF0_P6 :
NehalemMsr.h
MSR_NEHALEM_R0_PMON_IPERF0_P7 :
NehalemMsr.h
MSR_NEHALEM_R0_PMON_QLX_P0 :
NehalemMsr.h
MSR_NEHALEM_R0_PMON_QLX_P1 :
NehalemMsr.h
MSR_NEHALEM_R0_PMON_QLX_P2 :
NehalemMsr.h
MSR_NEHALEM_R0_PMON_QLX_P3 :
NehalemMsr.h
MSR_NEHALEM_R1_PMON_BOX_CTRL :
NehalemMsr.h
MSR_NEHALEM_R1_PMON_BOX_OVF_CTRL :
NehalemMsr.h
MSR_NEHALEM_R1_PMON_BOX_STATUS :
NehalemMsr.h
MSR_NEHALEM_R1_PMON_CTR10 :
NehalemMsr.h
MSR_NEHALEM_R1_PMON_CTR11 :
NehalemMsr.h
MSR_NEHALEM_R1_PMON_CTR12 :
NehalemMsr.h
MSR_NEHALEM_R1_PMON_CTR13 :
NehalemMsr.h
MSR_NEHALEM_R1_PMON_CTR14 :
NehalemMsr.h
MSR_NEHALEM_R1_PMON_CTR15 :
NehalemMsr.h
MSR_NEHALEM_R1_PMON_CTR8 :
NehalemMsr.h
MSR_NEHALEM_R1_PMON_CTR9 :
NehalemMsr.h
MSR_NEHALEM_R1_PMON_EVNT_SEL10 :
NehalemMsr.h
MSR_NEHALEM_R1_PMON_EVNT_SEL11 :
NehalemMsr.h
MSR_NEHALEM_R1_PMON_EVNT_SEL12 :
NehalemMsr.h
MSR_NEHALEM_R1_PMON_EVNT_SEL13 :
NehalemMsr.h
MSR_NEHALEM_R1_PMON_EVNT_SEL14 :
NehalemMsr.h
MSR_NEHALEM_R1_PMON_EVNT_SEL15 :
NehalemMsr.h
MSR_NEHALEM_R1_PMON_EVNT_SEL8 :
NehalemMsr.h
MSR_NEHALEM_R1_PMON_EVNT_SEL9 :
NehalemMsr.h
MSR_NEHALEM_R1_PMON_IPERF1_P10 :
NehalemMsr.h
MSR_NEHALEM_R1_PMON_IPERF1_P11 :
NehalemMsr.h
MSR_NEHALEM_R1_PMON_IPERF1_P12 :
NehalemMsr.h
MSR_NEHALEM_R1_PMON_IPERF1_P13 :
NehalemMsr.h
MSR_NEHALEM_R1_PMON_IPERF1_P14 :
NehalemMsr.h
MSR_NEHALEM_R1_PMON_IPERF1_P15 :
NehalemMsr.h
MSR_NEHALEM_R1_PMON_IPERF1_P8 :
NehalemMsr.h
MSR_NEHALEM_R1_PMON_IPERF1_P9 :
NehalemMsr.h
MSR_NEHALEM_R1_PMON_QLX_P4 :
NehalemMsr.h
MSR_NEHALEM_R1_PMON_QLX_P5 :
NehalemMsr.h
MSR_NEHALEM_R1_PMON_QLX_P6 :
NehalemMsr.h
MSR_NEHALEM_R1_PMON_QLX_P7 :
NehalemMsr.h
MSR_NEHALEM_S0_PMON_BOX_CTRL :
NehalemMsr.h
MSR_NEHALEM_S0_PMON_BOX_OVF_CTRL :
NehalemMsr.h
MSR_NEHALEM_S0_PMON_BOX_STATUS :
NehalemMsr.h
MSR_NEHALEM_S0_PMON_CTR0 :
NehalemMsr.h
MSR_NEHALEM_S0_PMON_CTR1 :
NehalemMsr.h
MSR_NEHALEM_S0_PMON_CTR2 :
NehalemMsr.h
MSR_NEHALEM_S0_PMON_CTR3 :
NehalemMsr.h
MSR_NEHALEM_S0_PMON_EVNT_SEL0 :
NehalemMsr.h
MSR_NEHALEM_S0_PMON_EVNT_SEL1 :
NehalemMsr.h
MSR_NEHALEM_S0_PMON_EVNT_SEL2 :
NehalemMsr.h
MSR_NEHALEM_S0_PMON_EVNT_SEL3 :
NehalemMsr.h
MSR_NEHALEM_S0_PMON_MASK :
NehalemMsr.h
MSR_NEHALEM_S0_PMON_MATCH :
NehalemMsr.h
MSR_NEHALEM_S1_PMON_BOX_CTRL :
NehalemMsr.h
MSR_NEHALEM_S1_PMON_BOX_OVF_CTRL :
NehalemMsr.h
MSR_NEHALEM_S1_PMON_BOX_STATUS :
NehalemMsr.h
MSR_NEHALEM_S1_PMON_CTR0 :
NehalemMsr.h
MSR_NEHALEM_S1_PMON_CTR1 :
NehalemMsr.h
MSR_NEHALEM_S1_PMON_CTR2 :
NehalemMsr.h
MSR_NEHALEM_S1_PMON_CTR3 :
NehalemMsr.h
MSR_NEHALEM_S1_PMON_EVNT_SEL0 :
NehalemMsr.h
MSR_NEHALEM_S1_PMON_EVNT_SEL1 :
NehalemMsr.h
MSR_NEHALEM_S1_PMON_EVNT_SEL2 :
NehalemMsr.h
MSR_NEHALEM_S1_PMON_EVNT_SEL3 :
NehalemMsr.h
MSR_NEHALEM_S1_PMON_MASK :
NehalemMsr.h
MSR_NEHALEM_S1_PMON_MATCH :
NehalemMsr.h
MSR_NEHALEM_SMI_COUNT :
NehalemMsr.h
MSR_NEHALEM_TEMPERATURE_TARGET :
NehalemMsr.h
MSR_NEHALEM_TURBO_POWER_CURRENT_LIMIT :
NehalemMsr.h
MSR_NEHALEM_TURBO_RATIO_LIMIT :
NehalemMsr.h
MSR_NEHALEM_U_PMON_CTR :
NehalemMsr.h
MSR_NEHALEM_U_PMON_EVNT_SEL :
NehalemMsr.h
MSR_NEHALEM_U_PMON_GLOBAL_CTRL :
NehalemMsr.h
MSR_NEHALEM_U_PMON_GLOBAL_OVF_CTRL :
NehalemMsr.h
MSR_NEHALEM_U_PMON_GLOBAL_STATUS :
NehalemMsr.h
MSR_NEHALEM_UNCORE_ADDR_OPCODE_MATCH :
NehalemMsr.h
MSR_NEHALEM_UNCORE_FIXED_CTR0 :
NehalemMsr.h
MSR_NEHALEM_UNCORE_FIXED_CTR_CTRL :
NehalemMsr.h
MSR_NEHALEM_UNCORE_PERF_GLOBAL_CTRL :
NehalemMsr.h
MSR_NEHALEM_UNCORE_PERF_GLOBAL_OVF_CTRL :
NehalemMsr.h
MSR_NEHALEM_UNCORE_PERF_GLOBAL_STATUS :
NehalemMsr.h
MSR_NEHALEM_UNCORE_PERFEVTSEL0 :
NehalemMsr.h
MSR_NEHALEM_UNCORE_PERFEVTSEL1 :
NehalemMsr.h
MSR_NEHALEM_UNCORE_PERFEVTSEL2 :
NehalemMsr.h
MSR_NEHALEM_UNCORE_PERFEVTSEL3 :
NehalemMsr.h
MSR_NEHALEM_UNCORE_PERFEVTSEL4 :
NehalemMsr.h
MSR_NEHALEM_UNCORE_PERFEVTSEL5 :
NehalemMsr.h
MSR_NEHALEM_UNCORE_PERFEVTSEL6 :
NehalemMsr.h
MSR_NEHALEM_UNCORE_PERFEVTSEL7 :
NehalemMsr.h
MSR_NEHALEM_UNCORE_PMC0 :
NehalemMsr.h
MSR_NEHALEM_UNCORE_PMC1 :
NehalemMsr.h
MSR_NEHALEM_UNCORE_PMC2 :
NehalemMsr.h
MSR_NEHALEM_UNCORE_PMC3 :
NehalemMsr.h
MSR_NEHALEM_UNCORE_PMC4 :
NehalemMsr.h
MSR_NEHALEM_UNCORE_PMC5 :
NehalemMsr.h
MSR_NEHALEM_UNCORE_PMC6 :
NehalemMsr.h
MSR_NEHALEM_UNCORE_PMC7 :
NehalemMsr.h
MSR_NEHALEM_W_PMON_BOX_CTRL :
NehalemMsr.h
MSR_NEHALEM_W_PMON_BOX_OVF_CTRL :
NehalemMsr.h
MSR_NEHALEM_W_PMON_BOX_STATUS :
NehalemMsr.h
MSR_NEHALEM_W_PMON_CTR0 :
NehalemMsr.h
MSR_NEHALEM_W_PMON_CTR1 :
NehalemMsr.h
MSR_NEHALEM_W_PMON_CTR2 :
NehalemMsr.h
MSR_NEHALEM_W_PMON_CTR3 :
NehalemMsr.h
MSR_NEHALEM_W_PMON_EVNT_SEL0 :
NehalemMsr.h
MSR_NEHALEM_W_PMON_EVNT_SEL1 :
NehalemMsr.h
MSR_NEHALEM_W_PMON_EVNT_SEL2 :
NehalemMsr.h
MSR_NEHALEM_W_PMON_EVNT_SEL3 :
NehalemMsr.h
MSR_NEHALEM_W_PMON_FIXED_CTR :
NehalemMsr.h
MSR_NEHALEM_W_PMON_FIXED_CTR_CTL :
NehalemMsr.h
MSR_P6_APIC_BASE :
P6Msr.h
MSR_P6_BBL_CR_ADDR :
P6Msr.h
MSR_P6_BBL_CR_BUSY :
P6Msr.h
MSR_P6_BBL_CR_CTL :
P6Msr.h
MSR_P6_BBL_CR_CTL3 :
P6Msr.h
MSR_P6_BBL_CR_D0 :
P6Msr.h
MSR_P6_BBL_CR_D1 :
P6Msr.h
MSR_P6_BBL_CR_D2 :
P6Msr.h
MSR_P6_BBL_CR_DECC :
P6Msr.h
MSR_P6_BBL_CR_TRIG :
P6Msr.h
MSR_P6_BIOS_SIGN :
P6Msr.h
MSR_P6_BIOS_UPDT_TRIG :
P6Msr.h
MSR_P6_DEBUGCTLMSR :
P6Msr.h
MSR_P6_EBL_CR_POWERON :
P6Msr.h
MSR_P6_IA32_PLATFORM_ID :
P6Msr.h
MSR_P6_LASTBRANCHFROMIP :
P6Msr.h
MSR_P6_LASTBRANCHTOIP :
P6Msr.h
MSR_P6_LASTINTFROMIP :
P6Msr.h
MSR_P6_LASTINTTOIP :
P6Msr.h
MSR_P6_MC0_ADDR :
P6Msr.h
MSR_P6_MC0_CTL :
P6Msr.h
MSR_P6_MC0_MISC :
P6Msr.h
MSR_P6_MC0_STATUS :
P6Msr.h
MSR_P6_MC1_ADDR :
P6Msr.h
MSR_P6_MC1_CTL :
P6Msr.h
MSR_P6_MC1_MISC :
P6Msr.h
MSR_P6_MC1_STATUS :
P6Msr.h
MSR_P6_MC2_ADDR :
P6Msr.h
MSR_P6_MC2_CTL :
P6Msr.h
MSR_P6_MC2_MISC :
P6Msr.h
MSR_P6_MC2_STATUS :
P6Msr.h
MSR_P6_MC3_ADDR :
P6Msr.h
MSR_P6_MC3_CTL :
P6Msr.h
MSR_P6_MC3_MISC :
P6Msr.h
MSR_P6_MC3_STATUS :
P6Msr.h
MSR_P6_MC4_ADDR :
P6Msr.h
MSR_P6_MC4_CTL :
P6Msr.h
MSR_P6_MC4_MISC :
P6Msr.h
MSR_P6_MC4_STATUS :
P6Msr.h
MSR_P6_MCG_CAP :
P6Msr.h
MSR_P6_MCG_CTL :
P6Msr.h
MSR_P6_MCG_STATUS :
P6Msr.h
MSR_P6_MTRRCAP :
P6Msr.h
MSR_P6_MTRRDEFTYPE :
P6Msr.h
MSR_P6_MTRRFIX16K_80000 :
P6Msr.h
MSR_P6_MTRRFIX16K_A0000 :
P6Msr.h
MSR_P6_MTRRFIX4K_C0000 :
P6Msr.h
MSR_P6_MTRRFIX4K_C8000 :
P6Msr.h
MSR_P6_MTRRFIX4K_D0000 :
P6Msr.h
MSR_P6_MTRRFIX4K_D8000 :
P6Msr.h
MSR_P6_MTRRFIX4K_E0000 :
P6Msr.h
MSR_P6_MTRRFIX4K_E8000 :
P6Msr.h
MSR_P6_MTRRFIX4K_F0000 :
P6Msr.h
MSR_P6_MTRRFIX4K_F8000 :
P6Msr.h
MSR_P6_MTRRFIX64K_00000 :
P6Msr.h
MSR_P6_MTRRPHYSBASE0 :
P6Msr.h
MSR_P6_MTRRPHYSBASE1 :
P6Msr.h
MSR_P6_MTRRPHYSBASE2 :
P6Msr.h
MSR_P6_MTRRPHYSBASE3 :
P6Msr.h
MSR_P6_MTRRPHYSBASE4 :
P6Msr.h
MSR_P6_MTRRPHYSBASE5 :
P6Msr.h
MSR_P6_MTRRPHYSBASE6 :
P6Msr.h
MSR_P6_MTRRPHYSBASE7 :
P6Msr.h
MSR_P6_MTRRPHYSMASK0 :
P6Msr.h
MSR_P6_MTRRPHYSMASK1 :
P6Msr.h
MSR_P6_MTRRPHYSMASK2 :
P6Msr.h
MSR_P6_MTRRPHYSMASK3 :
P6Msr.h
MSR_P6_MTRRPHYSMASK4 :
P6Msr.h
MSR_P6_MTRRPHYSMASK5 :
P6Msr.h
MSR_P6_MTRRPHYSMASK6 :
P6Msr.h
MSR_P6_MTRRPHYSMASK7 :
P6Msr.h
MSR_P6_P5_MC_ADDR :
P6Msr.h
MSR_P6_P5_MC_TYPE :
P6Msr.h
MSR_P6_PERFCTR0 :
P6Msr.h
MSR_P6_PERFCTR1 :
P6Msr.h
MSR_P6_PERFEVTSEL0 :
P6Msr.h
MSR_P6_PERFEVTSEL1 :
P6Msr.h
MSR_P6_SYSENTER_CS_MSR :
P6Msr.h
MSR_P6_SYSENTER_EIP_MSR :
P6Msr.h
MSR_P6_SYSENTER_ESP_MSR :
P6Msr.h
MSR_P6_TEST_CTL :
P6Msr.h
MSR_P6_TSC :
P6Msr.h
MSR_PENTIUM_4_ALF_ESCR0 :
Pentium4Msr.h
MSR_PENTIUM_4_ALF_ESCR1 :
Pentium4Msr.h
MSR_PENTIUM_4_BPU_CCCR0 :
Pentium4Msr.h
MSR_PENTIUM_4_BPU_CCCR1 :
Pentium4Msr.h
MSR_PENTIUM_4_BPU_CCCR2 :
Pentium4Msr.h
MSR_PENTIUM_4_BPU_CCCR3 :
Pentium4Msr.h
MSR_PENTIUM_4_BPU_COUNTER0 :
Pentium4Msr.h
MSR_PENTIUM_4_BPU_COUNTER1 :
Pentium4Msr.h
MSR_PENTIUM_4_BPU_COUNTER2 :
Pentium4Msr.h
MSR_PENTIUM_4_BPU_COUNTER3 :
Pentium4Msr.h
MSR_PENTIUM_4_BPU_ESCR0 :
Pentium4Msr.h
MSR_PENTIUM_4_BPU_ESCR1 :
Pentium4Msr.h
MSR_PENTIUM_4_BSU_ESCR0 :
Pentium4Msr.h
MSR_PENTIUM_4_BSU_ESCR1 :
Pentium4Msr.h
MSR_PENTIUM_4_CRU_ESCR0 :
Pentium4Msr.h
MSR_PENTIUM_4_CRU_ESCR1 :
Pentium4Msr.h
MSR_PENTIUM_4_CRU_ESCR2 :
Pentium4Msr.h
MSR_PENTIUM_4_CRU_ESCR3 :
Pentium4Msr.h
MSR_PENTIUM_4_CRU_ESCR4 :
Pentium4Msr.h
MSR_PENTIUM_4_CRU_ESCR5 :
Pentium4Msr.h
MSR_PENTIUM_4_DAC_ESCR0 :
Pentium4Msr.h
MSR_PENTIUM_4_DAC_ESCR1 :
Pentium4Msr.h
MSR_PENTIUM_4_DEBUGCTLA :
Pentium4Msr.h
MSR_PENTIUM_4_EBC_FREQUENCY_ID :
Pentium4Msr.h
MSR_PENTIUM_4_EBC_FREQUENCY_ID_1 :
Pentium4Msr.h
MSR_PENTIUM_4_EBC_HARD_POWERON :
Pentium4Msr.h
MSR_PENTIUM_4_EBC_SOFT_POWERON :
Pentium4Msr.h
MSR_PENTIUM_4_EFSB_DRDY0 :
Pentium4Msr.h
MSR_PENTIUM_4_EFSB_DRDY1 :
Pentium4Msr.h
MSR_PENTIUM_4_EMON_L3_CTR_CTL0 :
Pentium4Msr.h
MSR_PENTIUM_4_EMON_L3_CTR_CTL1 :
Pentium4Msr.h
MSR_PENTIUM_4_EMON_L3_CTR_CTL2 :
Pentium4Msr.h
MSR_PENTIUM_4_EMON_L3_CTR_CTL3 :
Pentium4Msr.h
MSR_PENTIUM_4_EMON_L3_CTR_CTL4 :
Pentium4Msr.h
MSR_PENTIUM_4_EMON_L3_CTR_CTL5 :
Pentium4Msr.h
MSR_PENTIUM_4_EMON_L3_CTR_CTL6 :
Pentium4Msr.h
MSR_PENTIUM_4_EMON_L3_CTR_CTL7 :
Pentium4Msr.h
MSR_PENTIUM_4_FIRM_ESCR0 :
Pentium4Msr.h
MSR_PENTIUM_4_FIRM_ESCR1 :
Pentium4Msr.h
MSR_PENTIUM_4_FLAME_CCCR0 :
Pentium4Msr.h
MSR_PENTIUM_4_FLAME_CCCR1 :
Pentium4Msr.h
MSR_PENTIUM_4_FLAME_CCCR2 :
Pentium4Msr.h
MSR_PENTIUM_4_FLAME_CCCR3 :
Pentium4Msr.h
MSR_PENTIUM_4_FLAME_COUNTER0 :
Pentium4Msr.h
MSR_PENTIUM_4_FLAME_COUNTER1 :
Pentium4Msr.h
MSR_PENTIUM_4_FLAME_COUNTER2 :
Pentium4Msr.h
MSR_PENTIUM_4_FLAME_COUNTER3 :
Pentium4Msr.h
MSR_PENTIUM_4_FLAME_ESCR0 :
Pentium4Msr.h
MSR_PENTIUM_4_FLAME_ESCR1 :
Pentium4Msr.h
MSR_PENTIUM_4_FSB_ESCR0 :
Pentium4Msr.h
MSR_PENTIUM_4_FSB_ESCR1 :
Pentium4Msr.h
MSR_PENTIUM_4_IA32_MISC_ENABLE :
Pentium4Msr.h
MSR_PENTIUM_4_IA32_MONITOR_FILTER_LINE_SIZE :
Pentium4Msr.h
MSR_PENTIUM_4_IFSB_BUSQ0 :
Pentium4Msr.h
MSR_PENTIUM_4_IFSB_BUSQ1 :
Pentium4Msr.h
MSR_PENTIUM_4_IFSB_CNTR7 :
Pentium4Msr.h
MSR_PENTIUM_4_IFSB_CTL6 :
Pentium4Msr.h
MSR_PENTIUM_4_IFSB_SNPQ0 :
Pentium4Msr.h
MSR_PENTIUM_4_IFSB_SNPQ1 :
Pentium4Msr.h
MSR_PENTIUM_4_IQ_CCCR0 :
Pentium4Msr.h
MSR_PENTIUM_4_IQ_CCCR1 :
Pentium4Msr.h
MSR_PENTIUM_4_IQ_CCCR2 :
Pentium4Msr.h
MSR_PENTIUM_4_IQ_CCCR3 :
Pentium4Msr.h
MSR_PENTIUM_4_IQ_CCCR4 :
Pentium4Msr.h
MSR_PENTIUM_4_IQ_CCCR5 :
Pentium4Msr.h
MSR_PENTIUM_4_IQ_COUNTER0 :
Pentium4Msr.h
MSR_PENTIUM_4_IQ_COUNTER1 :
Pentium4Msr.h
MSR_PENTIUM_4_IQ_COUNTER2 :
Pentium4Msr.h
MSR_PENTIUM_4_IQ_COUNTER3 :
Pentium4Msr.h
MSR_PENTIUM_4_IQ_COUNTER4 :
Pentium4Msr.h
MSR_PENTIUM_4_IQ_COUNTER5 :
Pentium4Msr.h
MSR_PENTIUM_4_IQ_ESCR0 :
Pentium4Msr.h
MSR_PENTIUM_4_IQ_ESCR1 :
Pentium4Msr.h
MSR_PENTIUM_4_IS_ESCR0 :
Pentium4Msr.h
MSR_PENTIUM_4_IS_ESCR1 :
Pentium4Msr.h
MSR_PENTIUM_4_ITLB_ESCR0 :
Pentium4Msr.h
MSR_PENTIUM_4_ITLB_ESCR1 :
Pentium4Msr.h
MSR_PENTIUM_4_IX_ESCR0 :
Pentium4Msr.h
MSR_PENTIUM_4_IX_ESCR1 :
Pentium4Msr.h
MSR_PENTIUM_4_LASTBRANCH_0 :
Pentium4Msr.h
MSR_PENTIUM_4_LASTBRANCH_0_FROM_IP :
Pentium4Msr.h
MSR_PENTIUM_4_LASTBRANCH_0_TO_IP :
Pentium4Msr.h
MSR_PENTIUM_4_LASTBRANCH_1 :
Pentium4Msr.h
MSR_PENTIUM_4_LASTBRANCH_10_FROM_IP :
Pentium4Msr.h
MSR_PENTIUM_4_LASTBRANCH_10_TO_IP :
Pentium4Msr.h
MSR_PENTIUM_4_LASTBRANCH_11_FROM_IP :
Pentium4Msr.h
MSR_PENTIUM_4_LASTBRANCH_11_TO_IP :
Pentium4Msr.h
MSR_PENTIUM_4_LASTBRANCH_12_FROM_IP :
Pentium4Msr.h
MSR_PENTIUM_4_LASTBRANCH_12_TO_IP :
Pentium4Msr.h
MSR_PENTIUM_4_LASTBRANCH_13_FROM_IP :
Pentium4Msr.h
MSR_PENTIUM_4_LASTBRANCH_13_TO_IP :
Pentium4Msr.h
MSR_PENTIUM_4_LASTBRANCH_14_FROM_IP :
Pentium4Msr.h
MSR_PENTIUM_4_LASTBRANCH_14_TO_IP :
Pentium4Msr.h
MSR_PENTIUM_4_LASTBRANCH_15_FROM_IP :
Pentium4Msr.h
MSR_PENTIUM_4_LASTBRANCH_15_TO_IP :
Pentium4Msr.h
MSR_PENTIUM_4_LASTBRANCH_1_FROM_IP :
Pentium4Msr.h
MSR_PENTIUM_4_LASTBRANCH_1_TO_IP :
Pentium4Msr.h
MSR_PENTIUM_4_LASTBRANCH_2 :
Pentium4Msr.h
MSR_PENTIUM_4_LASTBRANCH_2_FROM_IP :
Pentium4Msr.h
MSR_PENTIUM_4_LASTBRANCH_2_TO_IP :
Pentium4Msr.h
MSR_PENTIUM_4_LASTBRANCH_3 :
Pentium4Msr.h
MSR_PENTIUM_4_LASTBRANCH_3_FROM_IP :
Pentium4Msr.h
MSR_PENTIUM_4_LASTBRANCH_3_TO_IP :
Pentium4Msr.h
MSR_PENTIUM_4_LASTBRANCH_4_FROM_IP :
Pentium4Msr.h
MSR_PENTIUM_4_LASTBRANCH_4_TO_IP :
Pentium4Msr.h
MSR_PENTIUM_4_LASTBRANCH_5_FROM_IP :
Pentium4Msr.h
MSR_PENTIUM_4_LASTBRANCH_5_TO_IP :
Pentium4Msr.h
MSR_PENTIUM_4_LASTBRANCH_6_FROM_IP :
Pentium4Msr.h
MSR_PENTIUM_4_LASTBRANCH_6_TO_IP :
Pentium4Msr.h
MSR_PENTIUM_4_LASTBRANCH_7_FROM_IP :
Pentium4Msr.h
MSR_PENTIUM_4_LASTBRANCH_7_TO_IP :
Pentium4Msr.h
MSR_PENTIUM_4_LASTBRANCH_8_FROM_IP :
Pentium4Msr.h
MSR_PENTIUM_4_LASTBRANCH_8_TO_IP :
Pentium4Msr.h
MSR_PENTIUM_4_LASTBRANCH_9_FROM_IP :
Pentium4Msr.h
MSR_PENTIUM_4_LASTBRANCH_9_TO_IP :
Pentium4Msr.h
MSR_PENTIUM_4_LASTBRANCH_TOS :
Pentium4Msr.h
MSR_PENTIUM_4_LER_FROM_LIP :
Pentium4Msr.h
MSR_PENTIUM_4_LER_TO_LIP :
Pentium4Msr.h
MSR_PENTIUM_4_MCG_MISC :
Pentium4Msr.h
MSR_PENTIUM_4_MCG_R10 :
Pentium4Msr.h
MSR_PENTIUM_4_MCG_R11 :
Pentium4Msr.h
MSR_PENTIUM_4_MCG_R12 :
Pentium4Msr.h
MSR_PENTIUM_4_MCG_R13 :
Pentium4Msr.h
MSR_PENTIUM_4_MCG_R14 :
Pentium4Msr.h
MSR_PENTIUM_4_MCG_R15 :
Pentium4Msr.h
MSR_PENTIUM_4_MCG_R8 :
Pentium4Msr.h
MSR_PENTIUM_4_MCG_R9 :
Pentium4Msr.h
MSR_PENTIUM_4_MCG_RAX :
Pentium4Msr.h
MSR_PENTIUM_4_MCG_RBP :
Pentium4Msr.h
MSR_PENTIUM_4_MCG_RBX :
Pentium4Msr.h
MSR_PENTIUM_4_MCG_RCX :
Pentium4Msr.h
MSR_PENTIUM_4_MCG_RDI :
Pentium4Msr.h
MSR_PENTIUM_4_MCG_RDX :
Pentium4Msr.h
MSR_PENTIUM_4_MCG_RFLAGS :
Pentium4Msr.h
MSR_PENTIUM_4_MCG_RIP :
Pentium4Msr.h
MSR_PENTIUM_4_MCG_RSI :
Pentium4Msr.h
MSR_PENTIUM_4_MCG_RSP :
Pentium4Msr.h
MSR_PENTIUM_4_MOB_ESCR0 :
Pentium4Msr.h
MSR_PENTIUM_4_MOB_ESCR1 :
Pentium4Msr.h
MSR_PENTIUM_4_MS_CCCR0 :
Pentium4Msr.h
MSR_PENTIUM_4_MS_CCCR1 :
Pentium4Msr.h
MSR_PENTIUM_4_MS_CCCR2 :
Pentium4Msr.h
MSR_PENTIUM_4_MS_CCCR3 :
Pentium4Msr.h
MSR_PENTIUM_4_MS_COUNTER0 :
Pentium4Msr.h
MSR_PENTIUM_4_MS_COUNTER1 :
Pentium4Msr.h
MSR_PENTIUM_4_MS_COUNTER2 :
Pentium4Msr.h
MSR_PENTIUM_4_MS_COUNTER3 :
Pentium4Msr.h
MSR_PENTIUM_4_MS_ESCR0 :
Pentium4Msr.h
MSR_PENTIUM_4_MS_ESCR1 :
Pentium4Msr.h
MSR_PENTIUM_4_PEBS_ENABLE :
Pentium4Msr.h
MSR_PENTIUM_4_PEBS_MATRIX_VERT :
Pentium4Msr.h
MSR_PENTIUM_4_PLATFORM_BRV :
Pentium4Msr.h
MSR_PENTIUM_4_PMH_ESCR0 :
Pentium4Msr.h
MSR_PENTIUM_4_PMH_ESCR1 :
Pentium4Msr.h
MSR_PENTIUM_4_RAT_ESCR0 :
Pentium4Msr.h
MSR_PENTIUM_4_RAT_ESCR1 :
Pentium4Msr.h
MSR_PENTIUM_4_SAAT_ESCR0 :
Pentium4Msr.h
MSR_PENTIUM_4_SAAT_ESCR1 :
Pentium4Msr.h
MSR_PENTIUM_4_SSU_ESCR0 :
Pentium4Msr.h
MSR_PENTIUM_4_TBPU_ESCR0 :
Pentium4Msr.h
MSR_PENTIUM_4_TBPU_ESCR1 :
Pentium4Msr.h
MSR_PENTIUM_4_TC_ESCR0 :
Pentium4Msr.h
MSR_PENTIUM_4_TC_ESCR1 :
Pentium4Msr.h
MSR_PENTIUM_4_TC_PRECISE_EVENT :
Pentium4Msr.h
MSR_PENTIUM_4_THERM2_CTL :
Pentium4Msr.h
MSR_PENTIUM_4_U2L_ESCR0 :
Pentium4Msr.h
MSR_PENTIUM_4_U2L_ESCR1 :
Pentium4Msr.h
MSR_PENTIUM_CESR :
PentiumMsr.h
MSR_PENTIUM_CTR0 :
PentiumMsr.h
MSR_PENTIUM_CTR1 :
PentiumMsr.h
MSR_PENTIUM_M_BBL_CR_CTL :
PentiumMMsr.h
MSR_PENTIUM_M_BBL_CR_CTL3 :
PentiumMMsr.h
MSR_PENTIUM_M_DEBUGCTLB :
PentiumMMsr.h
MSR_PENTIUM_M_EBL_CR_POWERON :
PentiumMMsr.h
MSR_PENTIUM_M_IA32_MISC_ENABLE :
PentiumMMsr.h
MSR_PENTIUM_M_LASTBRANCH_0 :
PentiumMMsr.h
MSR_PENTIUM_M_LASTBRANCH_1 :
PentiumMMsr.h
MSR_PENTIUM_M_LASTBRANCH_2 :
PentiumMMsr.h
MSR_PENTIUM_M_LASTBRANCH_3 :
PentiumMMsr.h
MSR_PENTIUM_M_LASTBRANCH_4 :
PentiumMMsr.h
MSR_PENTIUM_M_LASTBRANCH_5 :
PentiumMMsr.h
MSR_PENTIUM_M_LASTBRANCH_6 :
PentiumMMsr.h
MSR_PENTIUM_M_LASTBRANCH_7 :
PentiumMMsr.h
MSR_PENTIUM_M_LASTBRANCH_TOS :
PentiumMMsr.h
MSR_PENTIUM_M_LER_FROM_LIP :
PentiumMMsr.h
MSR_PENTIUM_M_LER_TO_LIP :
PentiumMMsr.h
MSR_PENTIUM_M_MC3_ADDR :
PentiumMMsr.h
MSR_PENTIUM_M_MC3_CTL :
PentiumMMsr.h
MSR_PENTIUM_M_MC3_STATUS :
PentiumMMsr.h
MSR_PENTIUM_M_MC4_ADDR :
PentiumMMsr.h
MSR_PENTIUM_M_MC4_CTL :
PentiumMMsr.h
MSR_PENTIUM_M_MC4_STATUS :
PentiumMMsr.h
MSR_PENTIUM_M_P5_MC_ADDR :
PentiumMMsr.h
MSR_PENTIUM_M_P5_MC_TYPE :
PentiumMMsr.h
MSR_PENTIUM_M_THERM2_CTL :
PentiumMMsr.h
MSR_PENTIUM_P5_MC_ADDR :
PentiumMsr.h
MSR_PENTIUM_P5_MC_TYPE :
PentiumMsr.h
MSR_PENTIUM_TSC :
PentiumMsr.h
MSR_SANDY_BRIDGE_C0_PMON_BOX_CTL :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_C0_PMON_BOX_FILTER :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_C0_PMON_CTR0 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_C0_PMON_CTR1 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_C0_PMON_CTR2 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_C0_PMON_CTR3 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_C0_PMON_EVNTSEL0 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_C0_PMON_EVNTSEL1 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_C0_PMON_EVNTSEL2 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_C0_PMON_EVNTSEL3 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_C1_PMON_BOX_CTL :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_C1_PMON_BOX_FILTER :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_C1_PMON_CTR0 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_C1_PMON_CTR1 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_C1_PMON_CTR2 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_C1_PMON_CTR3 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_C1_PMON_EVNTSEL0 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_C1_PMON_EVNTSEL1 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_C1_PMON_EVNTSEL2 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_C1_PMON_EVNTSEL3 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_C2_PMON_BOX_CTL :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_C2_PMON_BOX_FILTER :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_C2_PMON_CTR0 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_C2_PMON_CTR1 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_C2_PMON_CTR2 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_C2_PMON_CTR3 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_C2_PMON_EVNTSEL0 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_C2_PMON_EVNTSEL1 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_C2_PMON_EVNTSEL2 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_C2_PMON_EVNTSEL3 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_C3_PMON_BOX_CTL :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_C3_PMON_BOX_FILTER :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_C3_PMON_CTR0 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_C3_PMON_CTR1 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_C3_PMON_CTR2 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_C3_PMON_CTR3 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_C3_PMON_EVNTSEL0 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_C3_PMON_EVNTSEL1 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_C3_PMON_EVNTSEL2 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_C3_PMON_EVNTSEL3 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_C4_PMON_BOX_CTL :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_C4_PMON_BOX_FILTER :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_C4_PMON_CTR0 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_C4_PMON_CTR1 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_C4_PMON_CTR2 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_C4_PMON_CTR3 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_C4_PMON_EVNTSEL0 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_C4_PMON_EVNTSEL1 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_C4_PMON_EVNTSEL2 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_C4_PMON_EVNTSEL3 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_C5_PMON_BOX_CTL :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_C5_PMON_BOX_FILTER :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_C5_PMON_CTR0 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_C5_PMON_CTR1 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_C5_PMON_CTR2 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_C5_PMON_CTR3 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_C5_PMON_EVNTSEL0 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_C5_PMON_EVNTSEL1 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_C5_PMON_EVNTSEL2 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_C5_PMON_EVNTSEL3 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_C6_PMON_BOX_CTL :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_C6_PMON_BOX_FILTER :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_C6_PMON_CTR0 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_C6_PMON_CTR1 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_C6_PMON_CTR2 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_C6_PMON_CTR3 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_C6_PMON_EVNTSEL0 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_C6_PMON_EVNTSEL1 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_C6_PMON_EVNTSEL2 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_C6_PMON_EVNTSEL3 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_C7_PMON_BOX_CTL :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_C7_PMON_BOX_FILTER :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_C7_PMON_CTR0 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_C7_PMON_CTR1 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_C7_PMON_CTR2 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_C7_PMON_CTR3 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_C7_PMON_EVNTSEL0 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_C7_PMON_EVNTSEL1 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_C7_PMON_EVNTSEL2 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_C7_PMON_EVNTSEL3 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_CORE_C3_RESIDENCY :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_CORE_C6_RESIDENCY :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_CORE_C7_RESIDENCY :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_DRAM_ENERGY_STATUS :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_DRAM_PERF_STATUS :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_DRAM_POWER_INFO :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_DRAM_POWER_LIMIT :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_ERROR_CONTROL :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_FEATURE_CONFIG :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_IA32_CLOCK_MODULATION :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_IA32_MC4_CTL :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_IA32_MC4_CTL2 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_IA32_MISC_ENABLE :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_IA32_PERF_GLOBAL_CTRL :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_IA32_PERF_GLOBAL_OVF_CTRL :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_IA32_PERF_GLOBAL_STATUS :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_IA32_PERFEVTSEL4 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_IA32_PERFEVTSEL5 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_IA32_PERFEVTSEL6 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_IA32_PERFEVTSEL7 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_IA32_VMX_EPT_VPID_ENUM :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_LASTBRANCH_0_FROM_IP :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_LASTBRANCH_0_TO_IP :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_LASTBRANCH_10_FROM_IP :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_LASTBRANCH_10_TO_IP :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_LASTBRANCH_11_FROM_IP :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_LASTBRANCH_11_TO_IP :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_LASTBRANCH_12_FROM_IP :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_LASTBRANCH_12_TO_IP :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_LASTBRANCH_13_FROM_IP :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_LASTBRANCH_13_TO_IP :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_LASTBRANCH_14_FROM_IP :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_LASTBRANCH_14_TO_IP :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_LASTBRANCH_15_FROM_IP :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_LASTBRANCH_15_TO_IP :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_LASTBRANCH_1_FROM_IP :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_LASTBRANCH_1_TO_IP :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_LASTBRANCH_2_FROM_IP :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_LASTBRANCH_2_TO_IP :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_LASTBRANCH_3_FROM_IP :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_LASTBRANCH_3_TO_IP :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_LASTBRANCH_4_FROM_IP :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_LASTBRANCH_4_TO_IP :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_LASTBRANCH_5_FROM_IP :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_LASTBRANCH_5_TO_IP :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_LASTBRANCH_6_FROM_IP :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_LASTBRANCH_6_TO_IP :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_LASTBRANCH_7_FROM_IP :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_LASTBRANCH_7_TO_IP :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_LASTBRANCH_8_FROM_IP :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_LASTBRANCH_8_TO_IP :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_LASTBRANCH_9_FROM_IP :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_LASTBRANCH_9_TO_IP :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_LASTBRANCH_TOS :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_LBR_SELECT :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_LER_FROM_LIP :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_LER_TO_LIP :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_MISC_FEATURE_CONTROL :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_MISC_PWR_MGMT :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_OFFCORE_RSP_0 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_OFFCORE_RSP_1 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_PCU_PMON_BOX_CTL :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_PCU_PMON_BOX_FILTER :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_PCU_PMON_CTR0 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_PCU_PMON_CTR1 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_PCU_PMON_CTR2 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_PCU_PMON_CTR3 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_PCU_PMON_EVNTSEL0 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_PCU_PMON_EVNTSEL1 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_PCU_PMON_EVNTSEL2 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_PCU_PMON_EVNTSEL3 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_PEBS_ENABLE :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_PEBS_LD_LAT :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_PEBS_NUM_ALT :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_PERF_STATUS :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_PKG_C2_RESIDENCY :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_PKG_C3_RESIDENCY :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_PKG_C6_RESIDENCY :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_PKG_C7_RESIDENCY :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_PKG_CST_CONFIG_CONTROL :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_PKG_ENERGY_STATUS :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_PKG_PERF_STATUS :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_PKG_POWER_INFO :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_PKG_POWER_LIMIT :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_PKGC3_IRTL :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_PKGC6_IRTL :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_PKGC7_IRTL :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_PLATFORM_INFO :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_PMG_IO_CAPTURE_BASE :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_POWER_CTL :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_PP0_ENERGY_STATUS :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_PP0_POLICY :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_PP0_POWER_LIMIT :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_PP1_ENERGY_STATUS :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_PP1_POLICY :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_PP1_POWER_LIMIT :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_RAPL_POWER_UNIT :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_SMI_COUNT :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_TEMPERATURE_TARGET :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_TURBO_RATIO_LIMIT :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_U_PMON_CTR0 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_U_PMON_CTR1 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_U_PMON_EVNTSEL0 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_U_PMON_EVNTSEL1 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_U_PMON_UCLK_FIXED_CTL :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_U_PMON_UCLK_FIXED_CTR :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_UNC_ARB_PERFCTR0 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_UNC_ARB_PERFCTR1 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_UNC_ARB_PERFEVTSEL0 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_UNC_ARB_PERFEVTSEL1 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_UNC_CBO_0_PERFCTR0 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_UNC_CBO_0_PERFCTR1 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_UNC_CBO_0_PERFCTR2 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_UNC_CBO_0_PERFCTR3 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_UNC_CBO_0_PERFEVTSEL0 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_UNC_CBO_0_PERFEVTSEL1 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_UNC_CBO_0_PERFEVTSEL2 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_UNC_CBO_0_PERFEVTSEL3 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_UNC_CBO_0_UNIT_STATUS :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_UNC_CBO_1_PERFCTR0 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_UNC_CBO_1_PERFCTR1 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_UNC_CBO_1_PERFCTR2 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_UNC_CBO_1_PERFCTR3 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_UNC_CBO_1_PERFEVTSEL0 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_UNC_CBO_1_PERFEVTSEL1 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_UNC_CBO_1_PERFEVTSEL2 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_UNC_CBO_1_PERFEVTSEL3 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_UNC_CBO_1_UNIT_STATUS :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_UNC_CBO_2_PERFCTR0 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_UNC_CBO_2_PERFCTR1 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_UNC_CBO_2_PERFCTR2 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_UNC_CBO_2_PERFCTR3 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_UNC_CBO_2_PERFEVTSEL0 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_UNC_CBO_2_PERFEVTSEL1 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_UNC_CBO_2_PERFEVTSEL2 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_UNC_CBO_2_PERFEVTSEL3 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_UNC_CBO_2_UNIT_STATUS :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_UNC_CBO_3_PERFCTR0 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_UNC_CBO_3_PERFCTR1 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_UNC_CBO_3_PERFCTR2 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_UNC_CBO_3_PERFCTR3 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_UNC_CBO_3_PERFEVTSEL0 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_UNC_CBO_3_PERFEVTSEL1 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_UNC_CBO_3_PERFEVTSEL2 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_UNC_CBO_3_PERFEVTSEL3 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_UNC_CBO_3_UNIT_STATUS :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_UNC_CBO_4_PERFCTR0 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_UNC_CBO_4_PERFCTR1 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_UNC_CBO_4_PERFCTR2 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_UNC_CBO_4_PERFCTR3 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_UNC_CBO_4_PERFEVTSEL0 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_UNC_CBO_4_PERFEVTSEL1 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_UNC_CBO_4_PERFEVTSEL2 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_UNC_CBO_4_PERFEVTSEL3 :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_UNC_CBO_4_UNIT_STATUS :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_UNC_CBO_CONFIG :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_UNC_PERF_FIXED_CTR :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_UNC_PERF_FIXED_CTRL :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_UNC_PERF_GLOBAL_CTRL :
SandyBridgeMsr.h
MSR_SANDY_BRIDGE_UNC_PERF_GLOBAL_STATUS :
SandyBridgeMsr.h
MSR_SEV_ES_GHCB :
Fam17Msr.h
MSR_SEV_STATUS :
Fam17Msr.h
MSR_SILVERMONT_BBL_CR_CTL3 :
SilvermontMsr.h
MSR_SILVERMONT_CC6_DEMOTION_POLICY_CONFIG :
SilvermontMsr.h
MSR_SILVERMONT_CORE_C1_RESIDENCY :
SilvermontMsr.h
MSR_SILVERMONT_CORE_C6_RESIDENCY :
SilvermontMsr.h
MSR_SILVERMONT_EBL_CR_POWERON :
SilvermontMsr.h
MSR_SILVERMONT_FEATURE_CONFIG :
SilvermontMsr.h
MSR_SILVERMONT_FSB_FREQ :
SilvermontMsr.h
MSR_SILVERMONT_IA32_FEATURE_CONTROL :
SilvermontMsr.h
MSR_SILVERMONT_IA32_MISC_ENABLE :
SilvermontMsr.h
MSR_SILVERMONT_IA32_VMX_EPT_VPID_ENUM :
SilvermontMsr.h
MSR_SILVERMONT_IA32_VMX_FMFUNC :
SilvermontMsr.h
MSR_SILVERMONT_LASTBRANCH_0_FROM_IP :
SilvermontMsr.h
MSR_SILVERMONT_LASTBRANCH_0_TO_IP :
SilvermontMsr.h
MSR_SILVERMONT_LASTBRANCH_1_FROM_IP :
SilvermontMsr.h
MSR_SILVERMONT_LASTBRANCH_1_TO_IP :
SilvermontMsr.h
MSR_SILVERMONT_LASTBRANCH_2_FROM_IP :
SilvermontMsr.h
MSR_SILVERMONT_LASTBRANCH_2_TO_IP :
SilvermontMsr.h
MSR_SILVERMONT_LASTBRANCH_3_FROM_IP :
SilvermontMsr.h
MSR_SILVERMONT_LASTBRANCH_3_TO_IP :
SilvermontMsr.h
MSR_SILVERMONT_LASTBRANCH_4_FROM_IP :
SilvermontMsr.h
MSR_SILVERMONT_LASTBRANCH_4_TO_IP :
SilvermontMsr.h
MSR_SILVERMONT_LASTBRANCH_5_FROM_IP :
SilvermontMsr.h
MSR_SILVERMONT_LASTBRANCH_5_TO_IP :
SilvermontMsr.h
MSR_SILVERMONT_LASTBRANCH_6_FROM_IP :
SilvermontMsr.h
MSR_SILVERMONT_LASTBRANCH_6_TO_IP :
SilvermontMsr.h
MSR_SILVERMONT_LASTBRANCH_7_FROM_IP :
SilvermontMsr.h
MSR_SILVERMONT_LASTBRANCH_7_TO_IP :
SilvermontMsr.h
MSR_SILVERMONT_LASTBRANCH_TOS :
SilvermontMsr.h
MSR_SILVERMONT_LBR_SELECT :
SilvermontMsr.h
MSR_SILVERMONT_LER_FROM_LIP :
SilvermontMsr.h
MSR_SILVERMONT_LER_TO_LIP :
SilvermontMsr.h
MSR_SILVERMONT_MC6_DEMOTION_POLICY_CONFIG :
SilvermontMsr.h
MSR_SILVERMONT_MC6_RESIDENCY_COUNTER :
SilvermontMsr.h
MSR_SILVERMONT_MISC_FEATURE_CONTROL :
SilvermontMsr.h
MSR_SILVERMONT_OFFCORE_RSP_0 :
SilvermontMsr.h
MSR_SILVERMONT_OFFCORE_RSP_1 :
SilvermontMsr.h
MSR_SILVERMONT_PEBS_ENABLE :
SilvermontMsr.h
MSR_SILVERMONT_PKG_C6_RESIDENCY :
SilvermontMsr.h
MSR_SILVERMONT_PKG_CST_CONFIG_CONTROL :
SilvermontMsr.h
MSR_SILVERMONT_PKG_ENERGY_STATUS :
SilvermontMsr.h
MSR_SILVERMONT_PKG_POWER_INFO :
SilvermontMsr.h
MSR_SILVERMONT_PKG_POWER_LIMIT :
SilvermontMsr.h
MSR_SILVERMONT_PLATFORM_ID :
SilvermontMsr.h
MSR_SILVERMONT_PLATFORM_INFO :
SilvermontMsr.h
MSR_SILVERMONT_PMG_IO_CAPTURE_BASE :
SilvermontMsr.h
MSR_SILVERMONT_PP0_ENERGY_STATUS :
SilvermontMsr.h
MSR_SILVERMONT_PP0_POWER_LIMIT :
SilvermontMsr.h
MSR_SILVERMONT_RAPL_POWER_UNIT :
SilvermontMsr.h
MSR_SILVERMONT_SMI_COUNT :
SilvermontMsr.h
MSR_SILVERMONT_TEMPERATURE_TARGET :
SilvermontMsr.h
MSR_SILVERMONT_TURBO_RATIO_LIMIT :
SilvermontMsr.h
MSR_SKYLAKE_ANY_CORE_C0 :
SkylakeMsr.h
MSR_SKYLAKE_ANY_GFXE_C0 :
SkylakeMsr.h
MSR_SKYLAKE_BR_DETECT_CTRL :
SkylakeMsr.h
MSR_SKYLAKE_BR_DETECT_STATUS :
SkylakeMsr.h
MSR_SKYLAKE_CORE_C1_RESIDENCY :
SkylakeMsr.h
MSR_SKYLAKE_CORE_C3_RESIDENCY :
SkylakeMsr.h
MSR_SKYLAKE_CORE_GFXE_OVERLAP_C0 :
SkylakeMsr.h
MSR_SKYLAKE_CORE_HDC_RESIDENCY :
SkylakeMsr.h
MSR_SKYLAKE_CORE_PERF_LIMIT_REASONS :
SkylakeMsr.h
MSR_SKYLAKE_DRAM_ENERGY_STATUS :
SkylakeMsr.h
MSR_SKYLAKE_DRAM_PERF_STATUS :
SkylakeMsr.h
MSR_SKYLAKE_DRAM_POWER_INFO :
SkylakeMsr.h
MSR_SKYLAKE_DRAM_POWER_LIMIT :
SkylakeMsr.h
MSR_SKYLAKE_GRAPHICS_PERF_LIMIT_REASONS :
SkylakeMsr.h
MSR_SKYLAKE_IA32_L3_QOS_MASK_0 :
SkylakeMsr.h
MSR_SKYLAKE_IA32_L3_QOS_MASK_1 :
SkylakeMsr.h
MSR_SKYLAKE_IA32_L3_QOS_MASK_10 :
SkylakeMsr.h
MSR_SKYLAKE_IA32_L3_QOS_MASK_11 :
SkylakeMsr.h
MSR_SKYLAKE_IA32_L3_QOS_MASK_12 :
SkylakeMsr.h
MSR_SKYLAKE_IA32_L3_QOS_MASK_13 :
SkylakeMsr.h
MSR_SKYLAKE_IA32_L3_QOS_MASK_14 :
SkylakeMsr.h
MSR_SKYLAKE_IA32_L3_QOS_MASK_15 :
SkylakeMsr.h
MSR_SKYLAKE_IA32_L3_QOS_MASK_2 :
SkylakeMsr.h
MSR_SKYLAKE_IA32_L3_QOS_MASK_3 :
SkylakeMsr.h
MSR_SKYLAKE_IA32_L3_QOS_MASK_4 :
SkylakeMsr.h
MSR_SKYLAKE_IA32_L3_QOS_MASK_5 :
SkylakeMsr.h
MSR_SKYLAKE_IA32_L3_QOS_MASK_6 :
SkylakeMsr.h
MSR_SKYLAKE_IA32_L3_QOS_MASK_7 :
SkylakeMsr.h
MSR_SKYLAKE_IA32_L3_QOS_MASK_8 :
SkylakeMsr.h
MSR_SKYLAKE_IA32_L3_QOS_MASK_9 :
SkylakeMsr.h
MSR_SKYLAKE_IA32_MCG_CAP :
SkylakeMsr.h
MSR_SKYLAKE_IA32_PERF_GLOBAL_STATUS :
SkylakeMsr.h
MSR_SKYLAKE_IA32_PERF_GLOBAL_STATUS_RESET :
SkylakeMsr.h
MSR_SKYLAKE_IA32_PERF_GLOBAL_STATUS_SET :
SkylakeMsr.h
MSR_SKYLAKE_IA32_PQR_ASSOC :
SkylakeMsr.h
MSR_SKYLAKE_IA32_QM_EVTSEL :
SkylakeMsr.h
MSR_SKYLAKE_LASTBRANCH_16_FROM_IP :
SkylakeMsr.h
MSR_SKYLAKE_LASTBRANCH_16_TO_IP :
SkylakeMsr.h
MSR_SKYLAKE_LASTBRANCH_17_FROM_IP :
SkylakeMsr.h
MSR_SKYLAKE_LASTBRANCH_17_TO_IP :
SkylakeMsr.h
MSR_SKYLAKE_LASTBRANCH_18_FROM_IP :
SkylakeMsr.h
MSR_SKYLAKE_LASTBRANCH_18_TO_IP :
SkylakeMsr.h
MSR_SKYLAKE_LASTBRANCH_19_FROM_IP :
SkylakeMsr.h
MSR_SKYLAKE_LASTBRANCH_19_TO_IP :
SkylakeMsr.h
MSR_SKYLAKE_LASTBRANCH_20_FROM_IP :
SkylakeMsr.h
MSR_SKYLAKE_LASTBRANCH_20_TO_IP :
SkylakeMsr.h
MSR_SKYLAKE_LASTBRANCH_21_FROM_IP :
SkylakeMsr.h
MSR_SKYLAKE_LASTBRANCH_21_TO_IP :
SkylakeMsr.h
MSR_SKYLAKE_LASTBRANCH_22_FROM_IP :
SkylakeMsr.h
MSR_SKYLAKE_LASTBRANCH_22_TO_IP :
SkylakeMsr.h
MSR_SKYLAKE_LASTBRANCH_23_FROM_IP :
SkylakeMsr.h
MSR_SKYLAKE_LASTBRANCH_23_TO_IP :
SkylakeMsr.h
MSR_SKYLAKE_LASTBRANCH_24_FROM_IP :
SkylakeMsr.h
MSR_SKYLAKE_LASTBRANCH_24_TO_IP :
SkylakeMsr.h
MSR_SKYLAKE_LASTBRANCH_25_FROM_IP :
SkylakeMsr.h
MSR_SKYLAKE_LASTBRANCH_25_TO_IP :
SkylakeMsr.h
MSR_SKYLAKE_LASTBRANCH_26_FROM_IP :
SkylakeMsr.h
MSR_SKYLAKE_LASTBRANCH_26_TO_IP :
SkylakeMsr.h
MSR_SKYLAKE_LASTBRANCH_27_FROM_IP :
SkylakeMsr.h
MSR_SKYLAKE_LASTBRANCH_27_TO_IP :
SkylakeMsr.h
MSR_SKYLAKE_LASTBRANCH_28_FROM_IP :
SkylakeMsr.h
MSR_SKYLAKE_LASTBRANCH_28_TO_IP :
SkylakeMsr.h
MSR_SKYLAKE_LASTBRANCH_29_FROM_IP :
SkylakeMsr.h
MSR_SKYLAKE_LASTBRANCH_29_TO_IP :
SkylakeMsr.h
MSR_SKYLAKE_LASTBRANCH_30_FROM_IP :
SkylakeMsr.h
MSR_SKYLAKE_LASTBRANCH_30_TO_IP :
SkylakeMsr.h
MSR_SKYLAKE_LASTBRANCH_31_FROM_IP :
SkylakeMsr.h
MSR_SKYLAKE_LASTBRANCH_31_TO_IP :
SkylakeMsr.h
MSR_SKYLAKE_LASTBRANCH_TOS :
SkylakeMsr.h
MSR_SKYLAKE_LBR_INFO_0 :
SkylakeMsr.h
MSR_SKYLAKE_LBR_INFO_1 :
SkylakeMsr.h
MSR_SKYLAKE_LBR_INFO_10 :
SkylakeMsr.h
MSR_SKYLAKE_LBR_INFO_11 :
SkylakeMsr.h
MSR_SKYLAKE_LBR_INFO_12 :
SkylakeMsr.h
MSR_SKYLAKE_LBR_INFO_13 :
SkylakeMsr.h
MSR_SKYLAKE_LBR_INFO_14 :
SkylakeMsr.h
MSR_SKYLAKE_LBR_INFO_15 :
SkylakeMsr.h
MSR_SKYLAKE_LBR_INFO_16 :
SkylakeMsr.h
MSR_SKYLAKE_LBR_INFO_17 :
SkylakeMsr.h
MSR_SKYLAKE_LBR_INFO_18 :
SkylakeMsr.h
MSR_SKYLAKE_LBR_INFO_19 :
SkylakeMsr.h
MSR_SKYLAKE_LBR_INFO_2 :
SkylakeMsr.h
MSR_SKYLAKE_LBR_INFO_20 :
SkylakeMsr.h
MSR_SKYLAKE_LBR_INFO_21 :
SkylakeMsr.h
MSR_SKYLAKE_LBR_INFO_22 :
SkylakeMsr.h
MSR_SKYLAKE_LBR_INFO_23 :
SkylakeMsr.h
MSR_SKYLAKE_LBR_INFO_24 :
SkylakeMsr.h
MSR_SKYLAKE_LBR_INFO_25 :
SkylakeMsr.h
MSR_SKYLAKE_LBR_INFO_26 :
SkylakeMsr.h
MSR_SKYLAKE_LBR_INFO_27 :
SkylakeMsr.h
MSR_SKYLAKE_LBR_INFO_28 :
SkylakeMsr.h
MSR_SKYLAKE_LBR_INFO_29 :
SkylakeMsr.h
MSR_SKYLAKE_LBR_INFO_3 :
SkylakeMsr.h
MSR_SKYLAKE_LBR_INFO_30 :
SkylakeMsr.h
MSR_SKYLAKE_LBR_INFO_31 :
SkylakeMsr.h
MSR_SKYLAKE_LBR_INFO_4 :
SkylakeMsr.h
MSR_SKYLAKE_LBR_INFO_5 :
SkylakeMsr.h
MSR_SKYLAKE_LBR_INFO_6 :
SkylakeMsr.h
MSR_SKYLAKE_LBR_INFO_7 :
SkylakeMsr.h
MSR_SKYLAKE_LBR_INFO_8 :
SkylakeMsr.h
MSR_SKYLAKE_LBR_INFO_9 :
SkylakeMsr.h
MSR_SKYLAKE_MSRUNCORE_RATIO_LIMIT :
SkylakeMsr.h
MSR_SKYLAKE_PEBS_FRONTEND :
SkylakeMsr.h
MSR_SKYLAKE_PKG_C3_RESIDENCY :
SkylakeMsr.h
MSR_SKYLAKE_PKG_CST_CONFIG_CONTROL :
SkylakeMsr.h
MSR_SKYLAKE_PKG_HDC_CONFIG :
SkylakeMsr.h
MSR_SKYLAKE_PKG_HDC_DEEP_RESIDENCY :
SkylakeMsr.h
MSR_SKYLAKE_PKG_HDC_SHALLOW_RESIDENCY :
SkylakeMsr.h
MSR_SKYLAKE_PLATFORM_ENERGY_COUNTER :
SkylakeMsr.h
MSR_SKYLAKE_PLATFORM_INFO :
SkylakeMsr.h
MSR_SKYLAKE_PLATFORM_POWER_LIMIT :
SkylakeMsr.h
MSR_SKYLAKE_POWER_CTL :
SkylakeMsr.h
MSR_SKYLAKE_PP0_ENERGY_STATUS :
SkylakeMsr.h
MSR_SKYLAKE_PPERF :
SkylakeMsr.h
MSR_SKYLAKE_PPIN :
SkylakeMsr.h
MSR_SKYLAKE_PPIN_CTL :
SkylakeMsr.h
MSR_SKYLAKE_PRMRR_PHYS_BASE :
SkylakeMsr.h
MSR_SKYLAKE_PRMRR_PHYS_MASK :
SkylakeMsr.h
MSR_SKYLAKE_PRMRR_VALID_CONFIG :
SkylakeMsr.h
MSR_SKYLAKE_RAPL_POWER_UNIT :
SkylakeMsr.h
MSR_SKYLAKE_RING_PERF_LIMIT_REASONS :
SkylakeMsr.h
MSR_SKYLAKE_RING_RATIO_LIMIT :
SkylakeMsr.h
MSR_SKYLAKE_SGXOWNER0 :
SkylakeMsr.h
MSR_SKYLAKE_SGXOWNER1 :
SkylakeMsr.h
MSR_SKYLAKE_SGXOWNEREPOCH0 :
SkylakeMsr.h
MSR_SKYLAKE_SGXOWNEREPOCH1 :
SkylakeMsr.h
MSR_SKYLAKE_SMM_MCA_CAP :
SkylakeMsr.h
MSR_SKYLAKE_TEMPERATURE_TARGET :
SkylakeMsr.h
MSR_SKYLAKE_TRACE_HUB_STH_ACPIBAR_BASE :
SkylakeMsr.h
MSR_SKYLAKE_TURBO_RATIO_LIMIT :
SkylakeMsr.h
MSR_SKYLAKE_TURBO_RATIO_LIMIT_CORES :
SkylakeMsr.h
MSR_SKYLAKE_UNC_ARB_PERFCTR0 :
SkylakeMsr.h
MSR_SKYLAKE_UNC_ARB_PERFCTR1 :
SkylakeMsr.h
MSR_SKYLAKE_UNC_ARB_PERFEVTSEL0 :
SkylakeMsr.h
MSR_SKYLAKE_UNC_ARB_PERFEVTSEL1 :
SkylakeMsr.h
MSR_SKYLAKE_UNC_CBO_0_PERFCTR0 :
SkylakeMsr.h
MSR_SKYLAKE_UNC_CBO_0_PERFCTR1 :
SkylakeMsr.h
MSR_SKYLAKE_UNC_CBO_0_PERFEVTSEL0 :
SkylakeMsr.h
MSR_SKYLAKE_UNC_CBO_0_PERFEVTSEL1 :
SkylakeMsr.h
MSR_SKYLAKE_UNC_CBO_1_PERFCTR0 :
SkylakeMsr.h
MSR_SKYLAKE_UNC_CBO_1_PERFCTR1 :
SkylakeMsr.h
MSR_SKYLAKE_UNC_CBO_1_PERFEVTSEL0 :
SkylakeMsr.h
MSR_SKYLAKE_UNC_CBO_1_PERFEVTSEL1 :
SkylakeMsr.h
MSR_SKYLAKE_UNC_CBO_2_PERFCTR0 :
SkylakeMsr.h
MSR_SKYLAKE_UNC_CBO_2_PERFCTR1 :
SkylakeMsr.h
MSR_SKYLAKE_UNC_CBO_2_PERFEVTSEL0 :
SkylakeMsr.h
MSR_SKYLAKE_UNC_CBO_2_PERFEVTSEL1 :
SkylakeMsr.h
MSR_SKYLAKE_UNC_CBO_3_PERFCTR0 :
SkylakeMsr.h
MSR_SKYLAKE_UNC_CBO_3_PERFCTR1 :
SkylakeMsr.h
MSR_SKYLAKE_UNC_CBO_3_PERFEVTSEL0 :
SkylakeMsr.h
MSR_SKYLAKE_UNC_CBO_3_PERFEVTSEL1 :
SkylakeMsr.h
MSR_SKYLAKE_UNC_CBO_CONFIG :
SkylakeMsr.h
MSR_SKYLAKE_UNC_PERF_FIXED_CTR :
SkylakeMsr.h
MSR_SKYLAKE_UNC_PERF_FIXED_CTRL :
SkylakeMsr.h
MSR_SKYLAKE_UNC_PERF_GLOBAL_CTRL :
SkylakeMsr.h
MSR_SKYLAKE_UNC_PERF_GLOBAL_STATUS :
SkylakeMsr.h
MSR_SKYLAKE_UNCORE_PRMRR_PHYS_BASE :
SkylakeMsr.h
MSR_SKYLAKE_UNCORE_PRMRR_PHYS_MASK :
SkylakeMsr.h
MSR_SKYLAKE_WEIGHTED_CORE_C0 :
SkylakeMsr.h
MSR_XEON_5600_FEATURE_CONFIG :
Xeon5600Msr.h
MSR_XEON_5600_IA32_ENERGY_PERF_BIAS :
Xeon5600Msr.h
MSR_XEON_5600_OFFCORE_RSP_1 :
Xeon5600Msr.h
MSR_XEON_5600_TURBO_RATIO_LIMIT :
Xeon5600Msr.h
MSR_XEON_D_CORE_PERF_LIMIT_REASONS :
XeonDMsr.h
MSR_XEON_D_DRAM_ENERGY_STATUS :
XeonDMsr.h
MSR_XEON_D_DRAM_PERF_STATUS :
XeonDMsr.h
MSR_XEON_D_DRAM_POWER_INFO :
XeonDMsr.h
MSR_XEON_D_DRAM_POWER_LIMIT :
XeonDMsr.h
MSR_XEON_D_IA32_L3_QOS_CFG :
XeonDMsr.h
MSR_XEON_D_IA32_L3_QOS_MASK_0 :
XeonDMsr.h
MSR_XEON_D_IA32_L3_QOS_MASK_1 :
XeonDMsr.h
MSR_XEON_D_IA32_L3_QOS_MASK_10 :
XeonDMsr.h
MSR_XEON_D_IA32_L3_QOS_MASK_11 :
XeonDMsr.h
MSR_XEON_D_IA32_L3_QOS_MASK_12 :
XeonDMsr.h
MSR_XEON_D_IA32_L3_QOS_MASK_13 :
XeonDMsr.h
MSR_XEON_D_IA32_L3_QOS_MASK_14 :
XeonDMsr.h
MSR_XEON_D_IA32_L3_QOS_MASK_15 :
XeonDMsr.h
MSR_XEON_D_IA32_L3_QOS_MASK_2 :
XeonDMsr.h
MSR_XEON_D_IA32_L3_QOS_MASK_3 :
XeonDMsr.h
MSR_XEON_D_IA32_L3_QOS_MASK_4 :
XeonDMsr.h
MSR_XEON_D_IA32_L3_QOS_MASK_5 :
XeonDMsr.h
MSR_XEON_D_IA32_L3_QOS_MASK_6 :
XeonDMsr.h
MSR_XEON_D_IA32_L3_QOS_MASK_7 :
XeonDMsr.h
MSR_XEON_D_IA32_L3_QOS_MASK_8 :
XeonDMsr.h
MSR_XEON_D_IA32_L3_QOS_MASK_9 :
XeonDMsr.h
MSR_XEON_D_IA32_MCG_CAP :
XeonDMsr.h
MSR_XEON_D_IA32_PQR_ASSOC :
XeonDMsr.h
MSR_XEON_D_IA32_QM_EVTSEL :
XeonDMsr.h
MSR_XEON_D_MSRUNCORE_RATIO_LIMIT :
XeonDMsr.h
MSR_XEON_D_PKG_CST_CONFIG_CONTROL :
XeonDMsr.h
MSR_XEON_D_PLATFORM_INFO :
XeonDMsr.h
MSR_XEON_D_PP0_ENERGY_STATUS :
XeonDMsr.h
MSR_XEON_D_PPIN :
XeonDMsr.h
MSR_XEON_D_PPIN_CTL :
XeonDMsr.h
MSR_XEON_D_RAPL_POWER_UNIT :
XeonDMsr.h
MSR_XEON_D_SMM_MCA_CAP :
XeonDMsr.h
MSR_XEON_D_TEMPERATURE_TARGET :
XeonDMsr.h
MSR_XEON_D_TURBO_RATIO_LIMIT :
XeonDMsr.h
MSR_XEON_D_TURBO_RATIO_LIMIT1 :
XeonDMsr.h
MSR_XEON_D_TURBO_RATIO_LIMIT3 :
XeonDMsr.h
MSR_XEON_E7_C8_PMON_BOX_CTRL :
XeonE7Msr.h
MSR_XEON_E7_C8_PMON_BOX_OVF_CTRL :
XeonE7Msr.h
MSR_XEON_E7_C8_PMON_BOX_STATUS :
XeonE7Msr.h
MSR_XEON_E7_C8_PMON_CTR0 :
XeonE7Msr.h
MSR_XEON_E7_C8_PMON_CTR1 :
XeonE7Msr.h
MSR_XEON_E7_C8_PMON_CTR2 :
XeonE7Msr.h
MSR_XEON_E7_C8_PMON_CTR3 :
XeonE7Msr.h
MSR_XEON_E7_C8_PMON_CTR4 :
XeonE7Msr.h
MSR_XEON_E7_C8_PMON_CTR5 :
XeonE7Msr.h
MSR_XEON_E7_C8_PMON_EVNT_SEL0 :
XeonE7Msr.h
MSR_XEON_E7_C8_PMON_EVNT_SEL1 :
XeonE7Msr.h
MSR_XEON_E7_C8_PMON_EVNT_SEL2 :
XeonE7Msr.h
MSR_XEON_E7_C8_PMON_EVNT_SEL3 :
XeonE7Msr.h
MSR_XEON_E7_C8_PMON_EVNT_SEL4 :
XeonE7Msr.h
MSR_XEON_E7_C8_PMON_EVNT_SEL5 :
XeonE7Msr.h
MSR_XEON_E7_C9_PMON_BOX_CTRL :
XeonE7Msr.h
MSR_XEON_E7_C9_PMON_BOX_OVF_CTRL :
XeonE7Msr.h
MSR_XEON_E7_C9_PMON_BOX_STATUS :
XeonE7Msr.h
MSR_XEON_E7_C9_PMON_CTR0 :
XeonE7Msr.h
MSR_XEON_E7_C9_PMON_CTR1 :
XeonE7Msr.h
MSR_XEON_E7_C9_PMON_CTR2 :
XeonE7Msr.h
MSR_XEON_E7_C9_PMON_CTR3 :
XeonE7Msr.h
MSR_XEON_E7_C9_PMON_CTR4 :
XeonE7Msr.h
MSR_XEON_E7_C9_PMON_CTR5 :
XeonE7Msr.h
MSR_XEON_E7_C9_PMON_EVNT_SEL0 :
XeonE7Msr.h
MSR_XEON_E7_C9_PMON_EVNT_SEL1 :
XeonE7Msr.h
MSR_XEON_E7_C9_PMON_EVNT_SEL2 :
XeonE7Msr.h
MSR_XEON_E7_C9_PMON_EVNT_SEL3 :
XeonE7Msr.h
MSR_XEON_E7_C9_PMON_EVNT_SEL4 :
XeonE7Msr.h
MSR_XEON_E7_C9_PMON_EVNT_SEL5 :
XeonE7Msr.h
MSR_XEON_E7_FEATURE_CONFIG :
XeonE7Msr.h
MSR_XEON_E7_OFFCORE_RSP_1 :
XeonE7Msr.h
MSR_XEON_E7_TURBO_RATIO_LIMIT :
XeonE7Msr.h
MSR_XEON_PHI_CONFIG_TDP_CONTROL :
XeonPhiMsr.h
MSR_XEON_PHI_CONFIG_TDP_LEVEL1 :
XeonPhiMsr.h
MSR_XEON_PHI_CONFIG_TDP_LEVEL2 :
XeonPhiMsr.h
MSR_XEON_PHI_CONFIG_TDP_NOMINAL :
XeonPhiMsr.h
MSR_XEON_PHI_CORE_C6_RESIDENCY :
XeonPhiMsr.h
MSR_XEON_PHI_CORE_PERF_LIMIT_REASONS :
XeonPhiMsr.h
MSR_XEON_PHI_DRAM_ENERGY_STATUS :
XeonPhiMsr.h
MSR_XEON_PHI_DRAM_PERF_STATUS :
XeonPhiMsr.h
MSR_XEON_PHI_DRAM_POWER_INFO :
XeonPhiMsr.h
MSR_XEON_PHI_DRAM_POWER_LIMIT :
XeonPhiMsr.h
MSR_XEON_PHI_FEATURE_CONFIG :
XeonPhiMsr.h
MSR_XEON_PHI_IA32_MISC_ENABLE :
XeonPhiMsr.h
MSR_XEON_PHI_IA32_VMX_EPT_VPID_ENUM :
XeonPhiMsr.h
MSR_XEON_PHI_IA32_VMX_FMFUNC :
XeonPhiMsr.h
MSR_XEON_PHI_LASTBRANCH_TOS :
XeonPhiMsr.h
MSR_XEON_PHI_LBR_SELECT :
XeonPhiMsr.h
MSR_XEON_PHI_LER_FROM_LIP :
XeonPhiMsr.h
MSR_XEON_PHI_LER_TO_LIP :
XeonPhiMsr.h
MSR_XEON_PHI_MC0_RESIDENCY :
XeonPhiMsr.h
MSR_XEON_PHI_MC6_RESIDENCY :
XeonPhiMsr.h
MSR_XEON_PHI_MISC_FEATURE_CONTROL :
XeonPhiMsr.h
MSR_XEON_PHI_MISC_FEATURE_ENABLES :
XeonPhiMsr.h
MSR_XEON_PHI_MSRUNCORE_RATIO_LIMIT :
XeonPhiMsr.h
MSR_XEON_PHI_OFFCORE_RSP_0 :
XeonPhiMsr.h
MSR_XEON_PHI_OFFCORE_RSP_1 :
XeonPhiMsr.h
MSR_XEON_PHI_PEBS_ENABLE :
XeonPhiMsr.h
MSR_XEON_PHI_PKG_C2_RESIDENCY :
XeonPhiMsr.h
MSR_XEON_PHI_PKG_C3_RESIDENCY :
XeonPhiMsr.h
MSR_XEON_PHI_PKG_C6_RESIDENCY :
XeonPhiMsr.h
MSR_XEON_PHI_PKG_C7_RESIDENCY :
XeonPhiMsr.h
MSR_XEON_PHI_PKG_CST_CONFIG_CONTROL :
XeonPhiMsr.h
MSR_XEON_PHI_PKG_ENERGY_STATUS :
XeonPhiMsr.h
MSR_XEON_PHI_PKG_PERF_STATUS :
XeonPhiMsr.h
MSR_XEON_PHI_PKG_POWER_INFO :
XeonPhiMsr.h
MSR_XEON_PHI_PKG_POWER_LIMIT :
XeonPhiMsr.h
MSR_XEON_PHI_PLATFORM_INFO :
XeonPhiMsr.h
MSR_XEON_PHI_PMG_IO_CAPTURE_BASE :
XeonPhiMsr.h
MSR_XEON_PHI_PP0_ENERGY_STATUS :
XeonPhiMsr.h
MSR_XEON_PHI_PP0_POWER_LIMIT :
XeonPhiMsr.h
MSR_XEON_PHI_PPIN :
XeonPhiMsr.h
MSR_XEON_PHI_PPIN_CTL :
XeonPhiMsr.h
MSR_XEON_PHI_RAPL_POWER_UNIT :
XeonPhiMsr.h
MSR_XEON_PHI_SMI_COUNT :
XeonPhiMsr.h
MSR_XEON_PHI_SMM_MCA_CAP :
XeonPhiMsr.h
MSR_XEON_PHI_TEMPERATURE_TARGET :
XeonPhiMsr.h
MSR_XEON_PHI_TURBO_ACTIVATION_RATIO :
XeonPhiMsr.h
MSR_XEON_PHI_TURBO_RATIO_LIMIT :
XeonPhiMsr.h
MultS64x64() :
BaseLib.h
MultU64x32() :
BaseLib.h
MultU64x64() :
BaseLib.h
Generated on Sun Dec 5 2021 03:51:13 for MdePkg[all] by
1.8.6
1.8.6 
