MSR_XEON_D_TURBO_RATIO_LIMIT3_REGISTER Union Reference

Data Fields
struct {
UINT32   Reserved1:32
UINT32   Reserved2:31
UINT32   TurboRatioLimitConfigurationSemaphore:1
}	Bits
UINT64	Uint64

Detailed Description

MSR information returned for MSR index MSR_XEON_D_TURBO_RATIO_LIMIT3

Field Documentation

struct { ... } MSR_XEON_D_TURBO_RATIO_LIMIT3_REGISTER::Bits

Individual bit fields

UINT32 MSR_XEON_D_TURBO_RATIO_LIMIT3_REGISTER::Reserved1

UINT32 MSR_XEON_D_TURBO_RATIO_LIMIT3_REGISTER::Reserved2

UINT32 MSR_XEON_D_TURBO_RATIO_LIMIT3_REGISTER::TurboRatioLimitConfigurationSemaphore

[Bit 63] Package. Semaphore for Turbo Ratio Limit Configuration If 1, the processor uses override configuration specified in MSR_TURBO_RATIO_LIMIT, MSR_TURBO_RATIO_LIMIT1. If 0, the processor uses factory-set configuration (Default).

UINT64 MSR_XEON_D_TURBO_RATIO_LIMIT3_REGISTER::Uint64

All bit fields as a 64-bit value