MSR_XEON_D_TEMPERATURE_TARGET_REGISTER Union Reference

Data Fields
struct {
UINT32   Reserved1:16
UINT32   TemperatureTarget:8
UINT32   TCCActivationOffset:4
UINT32   Reserved2:4
UINT32   Reserved3:32
}	Bits
UINT32	Uint32
UINT64	Uint64

Detailed Description

MSR information returned for MSR index MSR_XEON_D_TEMPERATURE_TARGET

Field Documentation

struct { ... } MSR_XEON_D_TEMPERATURE_TARGET_REGISTER::Bits

Individual bit fields

UINT32 MSR_XEON_D_TEMPERATURE_TARGET_REGISTER::Reserved1

UINT32 MSR_XEON_D_TEMPERATURE_TARGET_REGISTER::Reserved2

UINT32 MSR_XEON_D_TEMPERATURE_TARGET_REGISTER::Reserved3

UINT32 MSR_XEON_D_TEMPERATURE_TARGET_REGISTER::TCCActivationOffset

[Bits 27:24] TCC Activation Offset (R/W) See Table 2-25.

UINT32 MSR_XEON_D_TEMPERATURE_TARGET_REGISTER::TemperatureTarget

[Bits 23:16] Temperature Target (RO) See Table 2-25.

UINT32 MSR_XEON_D_TEMPERATURE_TARGET_REGISTER::Uint32

All bit fields as a 32-bit value

UINT64 MSR_XEON_D_TEMPERATURE_TARGET_REGISTER::Uint64

All bit fields as a 64-bit value