MSR_XEON_D_PPIN_CTL_REGISTER Union Reference

Data Fields
struct {
UINT32   LockOut:1
UINT32   Enable_PPIN:1
UINT32   Reserved1:30
UINT32   Reserved2:32
}	Bits
UINT32	Uint32
UINT64	Uint64

Detailed Description

MSR information returned for MSR index MSR_XEON_D_PPIN_CTL

Field Documentation

struct { ... } MSR_XEON_D_PPIN_CTL_REGISTER::Bits

Individual bit fields

UINT32 MSR_XEON_D_PPIN_CTL_REGISTER::Enable_PPIN

[Bit 1] Enable_PPIN (R/W) See Table 2-25.

UINT32 MSR_XEON_D_PPIN_CTL_REGISTER::LockOut

[Bit 0] LockOut (R/WO) See Table 2-25.

UINT32 MSR_XEON_D_PPIN_CTL_REGISTER::Reserved1

UINT32 MSR_XEON_D_PPIN_CTL_REGISTER::Reserved2

UINT32 MSR_XEON_D_PPIN_CTL_REGISTER::Uint32

All bit fields as a 32-bit value

UINT64 MSR_XEON_D_PPIN_CTL_REGISTER::Uint64

All bit fields as a 64-bit value