Data Fields
struct {
UINT32 Reserved1:8

UINT32 MaximumNonTurboRatio:8

UINT32 Reserved2:7

UINT32 PPIN_CAP:1

UINT32 Reserved3:4

UINT32 RatioLimit:1

UINT32 TDPLimit:1

UINT32 TJOFFSET:1

UINT32 Reserved4:1

UINT32 Reserved5:8

UINT32 MaximumEfficiencyRatio:8

UINT32 Reserved6:16

}	Bits

UINT64	Uint64

Detailed Description

MSR information returned for MSR index MSR_XEON_D_PLATFORM_INFO

Field Documentation

struct { ... } MSR_XEON_D_PLATFORM_INFO_REGISTER::Bits

Individual bit fields

UINT32 MSR_XEON_D_PLATFORM_INFO_REGISTER::MaximumEfficiencyRatio

[Bits 47:40] Package. Maximum Efficiency Ratio (R/O) See Table 2-25.

UINT32 MSR_XEON_D_PLATFORM_INFO_REGISTER::MaximumNonTurboRatio

[Bits 15:8] Package. Maximum Non-Turbo Ratio (R/O) See Table 2-25.

UINT32 MSR_XEON_D_PLATFORM_INFO_REGISTER::PPIN_CAP

[Bit 23] Package. PPIN_CAP (R/O) See Table 2-25.

UINT32 MSR_XEON_D_PLATFORM_INFO_REGISTER::RatioLimit

[Bit 28] Package. Programmable Ratio Limit for Turbo Mode (R/O) See Table 2-25.

UINT32 MSR_XEON_D_PLATFORM_INFO_REGISTER::Reserved1

UINT32 MSR_XEON_D_PLATFORM_INFO_REGISTER::Reserved2

UINT32 MSR_XEON_D_PLATFORM_INFO_REGISTER::Reserved3

UINT32 MSR_XEON_D_PLATFORM_INFO_REGISTER::Reserved4

UINT32 MSR_XEON_D_PLATFORM_INFO_REGISTER::Reserved5

UINT32 MSR_XEON_D_PLATFORM_INFO_REGISTER::Reserved6

UINT32 MSR_XEON_D_PLATFORM_INFO_REGISTER::TDPLimit

[Bit 29] Package. Programmable TDP Limit for Turbo Mode (R/O) See Table 2-25.

UINT32 MSR_XEON_D_PLATFORM_INFO_REGISTER::TJOFFSET

[Bit 30] Package. Programmable TJ OFFSET (R/O) See Table 2-25.

UINT64 MSR_XEON_D_PLATFORM_INFO_REGISTER::Uint64

All bit fields as a 64-bit value