MSR_SKYLAKE_BR_DETECT_CTRL_REGISTER Union Reference

Data Fields
struct {
UINT32   EnMonitoring:1
UINT32   EnExcept:1
UINT32   EnLBRFrz:1
UINT32   DisableInGuest:1
UINT32   Reserved1:4
UINT32   WindowSize:10
UINT32   Reserved2:6
UINT32   WindowCntSel:2
UINT32   CntAndMode:1
UINT32   Reserved3:5
UINT32   Reserved4:32
}	Bits
UINT32	Uint32
UINT64	Uint64

Detailed Description

MSR information returned for MSR index MSR_SKYLAKE_BR_DETECT_CTRL

Field Documentation

struct { ... } MSR_SKYLAKE_BR_DETECT_CTRL_REGISTER::Bits

Individual bit fields

UINT32 MSR_SKYLAKE_BR_DETECT_CTRL_REGISTER::CntAndMode

[Bit 26] CntAndMode When set to '1', the overall branch monitoring event triggering condition is true only if all enabled counters' threshold conditions are true. When '0', the threshold tripping condition is true if any enabled counters' threshold is true.

UINT32 MSR_SKYLAKE_BR_DETECT_CTRL_REGISTER::DisableInGuest

[Bit 3] DisableInGuest When set to '1', branch monitoring, event triggering and LBR freeze actions are disabled when operating at VMX non-root operation.

UINT32 MSR_SKYLAKE_BR_DETECT_CTRL_REGISTER::EnExcept

[Bit 1] EnExcept Enable branch monitoring event signaling on threshold trip. The branch monitoring event handler is signaled via the existing PMI signaling mechanism as programmed from the corresponding local APIC LVT entry.

UINT32 MSR_SKYLAKE_BR_DETECT_CTRL_REGISTER::EnLBRFrz

[Bit 2] EnLBRFrz Enable LBR freeze on threshold trip. This will cause the LBR frozen bit 58 to be set in IA32_PERF_GLOBAL_STATUS when a triggering condition occurs and this bit is enabled.

UINT32 MSR_SKYLAKE_BR_DETECT_CTRL_REGISTER::EnMonitoring

[Bit 0] EnMonitoring Global enable for branch monitoring.

UINT32 MSR_SKYLAKE_BR_DETECT_CTRL_REGISTER::Reserved1

UINT32 MSR_SKYLAKE_BR_DETECT_CTRL_REGISTER::Reserved2

UINT32 MSR_SKYLAKE_BR_DETECT_CTRL_REGISTER::Reserved3

UINT32 MSR_SKYLAKE_BR_DETECT_CTRL_REGISTER::Reserved4

UINT32 MSR_SKYLAKE_BR_DETECT_CTRL_REGISTER::Uint32

All bit fields as a 32-bit value

UINT64 MSR_SKYLAKE_BR_DETECT_CTRL_REGISTER::Uint64

All bit fields as a 64-bit value

UINT32 MSR_SKYLAKE_BR_DETECT_CTRL_REGISTER::WindowCntSel

[Bits 25:24] WindowCntSel Window event count select: '00 = Instructions retired. '01 = Branch instructions retired '10 = Return instructions retired. '11 = Indirect branch instructions retired.

UINT32 MSR_SKYLAKE_BR_DETECT_CTRL_REGISTER::WindowSize

[Bits 17:8] WindowSize Window size defined by WindowCntSel. Values 0 - 1023 are supported. Once the Window counter reaches the WindowSize count both the Window Counter and all Branch Monitoring Counters are cleared.