MSR information returned for MSR index MSR_PENTIUM_4_EBC_HARD_POWERON
| UINT32 MSR_PENTIUM_4_EBC_HARD_POWERON_REGISTER::AgentID |
[Bits 13:12] Agent ID (R) Contains the logical agent ID value as set by the strapping of BR[3:0]. The logical ID value is written into the field on the deassertion of RESET#; the field is set to 1 when the address bus signal is asserted.
| UINT32 MSR_PENTIUM_4_EBC_HARD_POWERON_REGISTER::APICClusterID |
[Bits 6:5] APIC Cluster ID (R) Contains the logical APIC cluster ID value as set by the strapping of A12# and A11#. The logical cluster ID value is written into the field on the deassertion of RESET#; the field is set to 1 when the address bus signal is asserted.
| UINT32 MSR_PENTIUM_4_EBC_HARD_POWERON_REGISTER::BINIT_ObservationEnabled |
[Bit 4] BINIT# Observation Enabled (R) Indicates whether BINIT# observation is enabled (0) or disabled (1) as determined by the strapping of A10#. The value in this bit is written on the deassertion of RESET#; the bit is set to 1 when the address bus signal is asserted.
| struct { ... } MSR_PENTIUM_4_EBC_HARD_POWERON_REGISTER::Bits |
| UINT32 MSR_PENTIUM_4_EBC_HARD_POWERON_REGISTER::BusParkDisable |
[Bit 7] Bus Park Disable (R) Indicates whether bus park is enabled (0) or disabled (1) as set by the strapping of A15#. The value in this bit is written on the deassertion of RESET#; the bit is set to 1 when the address bus signal is asserted.
| UINT32 MSR_PENTIUM_4_EBC_HARD_POWERON_REGISTER::ExecuteBIST |
[Bit 1] Execute BIST (R) Indicates whether the execution of the BIST is enabled (1) or disabled (0) as set by the strapping of INIT#. The value in this bit is written on the deassertion of RESET#; the bit is set to 1 when the address bus signal is asserted.
| UINT32 MSR_PENTIUM_4_EBC_HARD_POWERON_REGISTER::InOrderQueueDepth |
[Bit 2] In Order Queue Depth (R) Indicates whether the in order queue depth for the system bus is 1 (1) or up to 12 (0) as set by the strapping of A7#. The value in this bit is written on the deassertion of RESET#; the bit is set to 1 when the address bus signal is asserted.
| UINT32 MSR_PENTIUM_4_EBC_HARD_POWERON_REGISTER::MCERR_ObservationDisabled |
[Bit 3] MCERR# Observation Disabled (R) Indicates whether MCERR# observation is enabled (0) or disabled (1) as determined by the strapping of A9#. The value in this bit is written on the deassertion of RESET#; the bit is set to 1 when the address bus signal is asserted.
| UINT32 MSR_PENTIUM_4_EBC_HARD_POWERON_REGISTER::OutputTriStateEnabled |
[Bit 0] Output Tri-state Enabled (R) Indicates whether tri-state output is enabled (1) or disabled (0) as set by the strapping of SMI#. The value in this bit is written on the deassertion of RESET#; the bit is set to 1 when the address bus signal is asserted.
| UINT32 MSR_PENTIUM_4_EBC_HARD_POWERON_REGISTER::Reserved1 |
| UINT32 MSR_PENTIUM_4_EBC_HARD_POWERON_REGISTER::Reserved2 |
| UINT32 MSR_PENTIUM_4_EBC_HARD_POWERON_REGISTER::Reserved3 |
| UINT32 MSR_PENTIUM_4_EBC_HARD_POWERON_REGISTER::Uint32 |
All bit fields as a 32-bit value
| UINT64 MSR_PENTIUM_4_EBC_HARD_POWERON_REGISTER::Uint64 |
All bit fields as a 64-bit value
1.8.6 
