MSR_IVY_BRIDGE_PPIN_CTL_REGISTER Union Reference

Data Fields
struct {
UINT32   LockOut:1
UINT32   Enable_PPIN:1
UINT32   Reserved1:30
UINT32   Reserved2:32
}	Bits
UINT32	Uint32
UINT64	Uint64

Detailed Description

MSR information returned for MSR index MSR_IVY_BRIDGE_PPIN_CTL

Field Documentation

struct { ... } MSR_IVY_BRIDGE_PPIN_CTL_REGISTER::Bits

Individual bit fields

UINT32 MSR_IVY_BRIDGE_PPIN_CTL_REGISTER::Enable_PPIN

[Bit 1] Enable_PPIN (R/W) If 1, enables MSR_PPIN to be accessible using RDMSR. Once set, attempt to write 1 to MSR_PPIN_CTL[bit 0] will cause #GP. If 0, an attempt to read MSR_PPIN will cause #GP. Default is 0.

UINT32 MSR_IVY_BRIDGE_PPIN_CTL_REGISTER::LockOut

[Bit 0] LockOut (R/WO) Set 1to prevent further writes to MSR_PPIN_CTL. Writing 1 to MSR_PPINCTL[bit 0] is permitted only if MSR_PPIN_CTL[bit 1] is clear, Default is 0. BIOS should provide an opt-in menu to enable the user to turn on MSR_PPIN_CTL[bit 1] for privileged inventory initialization agent to access MSR_PPIN. After reading MSR_PPIN, the privileged inventory initialization agent should write '01b' to MSR_PPIN_CTL to disable further access to MSR_PPIN and prevent unauthorized modification to MSR_PPIN_CTL.

UINT32 MSR_IVY_BRIDGE_PPIN_CTL_REGISTER::Reserved1

UINT32 MSR_IVY_BRIDGE_PPIN_CTL_REGISTER::Reserved2

UINT32 MSR_IVY_BRIDGE_PPIN_CTL_REGISTER::Uint32

All bit fields as a 32-bit value

UINT64 MSR_IVY_BRIDGE_PPIN_CTL_REGISTER::Uint64

All bit fields as a 64-bit value