Detailed Description

MSR information returned for MSR index MSR_IVY_BRIDGE_PEBS_ENABLE

Field Documentation

struct { ... } MSR_IVY_BRIDGE_PEBS_ENABLE_REGISTER::Bits

Individual bit fields

UINT32 MSR_IVY_BRIDGE_PEBS_ENABLE_REGISTER::LL_EN_PMC0

[Bit 32] Enable Load Latency on IA32_PMC0. (R/W).

UINT32 MSR_IVY_BRIDGE_PEBS_ENABLE_REGISTER::LL_EN_PMC1

[Bit 33] Enable Load Latency on IA32_PMC1. (R/W).

UINT32 MSR_IVY_BRIDGE_PEBS_ENABLE_REGISTER::LL_EN_PMC2

[Bit 34] Enable Load Latency on IA32_PMC2. (R/W).

UINT32 MSR_IVY_BRIDGE_PEBS_ENABLE_REGISTER::LL_EN_PMC3

[Bit 35] Enable Load Latency on IA32_PMC3. (R/W).

UINT32 MSR_IVY_BRIDGE_PEBS_ENABLE_REGISTER::PEBS_EN_PMC0

[Bit 0] Enable PEBS on IA32_PMC0. (R/W).

UINT32 MSR_IVY_BRIDGE_PEBS_ENABLE_REGISTER::PEBS_EN_PMC1

[Bit 1] Enable PEBS on IA32_PMC1. (R/W).

UINT32 MSR_IVY_BRIDGE_PEBS_ENABLE_REGISTER::PEBS_EN_PMC2

[Bit 2] Enable PEBS on IA32_PMC2. (R/W).

UINT32 MSR_IVY_BRIDGE_PEBS_ENABLE_REGISTER::PEBS_EN_PMC3

[Bit 3] Enable PEBS on IA32_PMC3. (R/W).

UINT32 MSR_IVY_BRIDGE_PEBS_ENABLE_REGISTER::Reserved1

UINT32 MSR_IVY_BRIDGE_PEBS_ENABLE_REGISTER::Reserved2

UINT64 MSR_IVY_BRIDGE_PEBS_ENABLE_REGISTER::Uint64

All bit fields as a 64-bit value