MSR_IA32_PM_ENABLE_REGISTER Union Reference

Data Fields
struct {
UINT32   HWP_ENABLE:1
UINT32   Reserved1:31
UINT32   Reserved2:32
}	Bits
UINT32	Uint32
UINT64	Uint64

Detailed Description

MSR information returned for MSR index MSR_IA32_PM_ENABLE

Field Documentation

struct { ... } MSR_IA32_PM_ENABLE_REGISTER::Bits

Individual bit fields

UINT32 MSR_IA32_PM_ENABLE_REGISTER::HWP_ENABLE

[Bit 0] HWP_ENABLE (R/W1-Once). See Section 14.4.2, "Enabling HWP". If CPUID.06H:EAX.[7] = 1.

UINT32 MSR_IA32_PM_ENABLE_REGISTER::Reserved1

UINT32 MSR_IA32_PM_ENABLE_REGISTER::Reserved2

UINT32 MSR_IA32_PM_ENABLE_REGISTER::Uint32

All bit fields as a 32-bit value

UINT64 MSR_IA32_PM_ENABLE_REGISTER::Uint64

All bit fields as a 64-bit value