MSR information returned for MSR index MSR_IA32_PM_CTL1
struct { ... } MSR_IA32_PM_CTL1_REGISTER::Bits |
UINT32 MSR_IA32_PM_CTL1_REGISTER::HDC_Allow_Block |
[Bit 0] HDC_Allow_Block (R/W) Allow/Block this logical processor for package level HDC control. See Section 14.5.3. If CPUID.06H:EAX.[13] = 1.
UINT32 MSR_IA32_PM_CTL1_REGISTER::Reserved1 |
UINT32 MSR_IA32_PM_CTL1_REGISTER::Reserved2 |
UINT32 MSR_IA32_PM_CTL1_REGISTER::Uint32 |
All bit fields as a 32-bit value
UINT64 MSR_IA32_PM_CTL1_REGISTER::Uint64 |
All bit fields as a 64-bit value