MSR_IA32_PERFEVTSEL_REGISTER Union Reference

Data Fields
struct {
UINT32   EventSelect:8
UINT32   UMASK:8
UINT32   USR:1
UINT32   OS:1
UINT32   E:1
UINT32   PC:1
UINT32   INT:1
UINT32   ANY:1
UINT32   EN:1
UINT32   INV:1
UINT32   CMASK:8
UINT32   Reserved:32
}	Bits
UINT32	Uint32
UINT64	Uint64

Detailed Description

MSR information returned for MSR indexes MSR_IA32_PERFEVTSEL0 to MSR_IA32_PERFEVTSEL3

Field Documentation

UINT32 MSR_IA32_PERFEVTSEL_REGISTER::ANY

[Bit 21] AnyThread: When set to 1, it enables counting the associated event conditions occurring across all logical processors sharing a processor core. When set to 0, the counter only increments the associated event conditions occurring in the logical processor which programmed the MSR.

struct { ... } MSR_IA32_PERFEVTSEL_REGISTER::Bits

Individual bit fields

UINT32 MSR_IA32_PERFEVTSEL_REGISTER::CMASK

[Bits 31:24] CMASK: When CMASK is not zero, the corresponding performance counter increments each cycle if the event count is greater than or equal to the CMASK.

UINT32 MSR_IA32_PERFEVTSEL_REGISTER::E

[Bit 18] Edge: Enables edge detection if set.

UINT32 MSR_IA32_PERFEVTSEL_REGISTER::EN

[Bit 22] EN: enables the corresponding performance counter to commence counting when this bit is set.

UINT32 MSR_IA32_PERFEVTSEL_REGISTER::EventSelect

[Bits 7:0] Event Select: Selects a performance event logic unit.

UINT32 MSR_IA32_PERFEVTSEL_REGISTER::INT

[Bit 20] INT: enables interrupt on counter overflow.

UINT32 MSR_IA32_PERFEVTSEL_REGISTER::INV

[Bit 23] INV: invert the CMASK.

UINT32 MSR_IA32_PERFEVTSEL_REGISTER::OS

[Bit 17] OS: Counts while in privilege level is ring 0.

UINT32 MSR_IA32_PERFEVTSEL_REGISTER::PC

[Bit 19] PC: enables pin control.

UINT32 MSR_IA32_PERFEVTSEL_REGISTER::Reserved

UINT32 MSR_IA32_PERFEVTSEL_REGISTER::Uint32

All bit fields as a 32-bit value

UINT64 MSR_IA32_PERFEVTSEL_REGISTER::Uint64

All bit fields as a 64-bit value

UINT32 MSR_IA32_PERFEVTSEL_REGISTER::UMASK

[Bits 15:8] UMask: Qualifies the microarchitectural condition to detect on the selected event logic.

UINT32 MSR_IA32_PERFEVTSEL_REGISTER::USR

[Bit 16] USR: Counts while in privilege level is not ring 0.