MSR_HASWELL_UNC_PERF_GLOBAL_CTRL_REGISTER Union Reference

Data Fields
struct {
UINT32   PMI_Sel_Core0:1
UINT32   PMI_Sel_Core1:1
UINT32   PMI_Sel_Core2:1
UINT32   PMI_Sel_Core3:1
UINT32   Reserved1:15
UINT32   Reserved2:10
UINT32   EN:1
UINT32   WakePMI:1
UINT32   FREEZE:1
UINT32   Reserved3:32
}	Bits
UINT32	Uint32
UINT64	Uint64

Detailed Description

MSR information returned for MSR index MSR_HASWELL_UNC_PERF_GLOBAL_CTRL

Field Documentation

struct { ... } MSR_HASWELL_UNC_PERF_GLOBAL_CTRL_REGISTER::Bits

Individual bit fields

UINT32 MSR_HASWELL_UNC_PERF_GLOBAL_CTRL_REGISTER::EN

[Bit 29] Enable all uncore counters.

UINT32 MSR_HASWELL_UNC_PERF_GLOBAL_CTRL_REGISTER::FREEZE

[Bit 31] Enable Freezing counter when overflow.

UINT32 MSR_HASWELL_UNC_PERF_GLOBAL_CTRL_REGISTER::PMI_Sel_Core0

[Bit 0] Core 0 select.

UINT32 MSR_HASWELL_UNC_PERF_GLOBAL_CTRL_REGISTER::PMI_Sel_Core1

[Bit 1] Core 1 select.

UINT32 MSR_HASWELL_UNC_PERF_GLOBAL_CTRL_REGISTER::PMI_Sel_Core2

[Bit 2] Core 2 select.

UINT32 MSR_HASWELL_UNC_PERF_GLOBAL_CTRL_REGISTER::PMI_Sel_Core3

[Bit 3] Core 3 select.

UINT32 MSR_HASWELL_UNC_PERF_GLOBAL_CTRL_REGISTER::Reserved1

UINT32 MSR_HASWELL_UNC_PERF_GLOBAL_CTRL_REGISTER::Reserved2

UINT32 MSR_HASWELL_UNC_PERF_GLOBAL_CTRL_REGISTER::Reserved3

UINT32 MSR_HASWELL_UNC_PERF_GLOBAL_CTRL_REGISTER::Uint32

All bit fields as a 32-bit value

UINT64 MSR_HASWELL_UNC_PERF_GLOBAL_CTRL_REGISTER::Uint64

All bit fields as a 64-bit value

UINT32 MSR_HASWELL_UNC_PERF_GLOBAL_CTRL_REGISTER::WakePMI

[Bit 30] Enable wake on PMI.