MSR_HASWELL_CONFIG_TDP_LEVEL1_REGISTER Union Reference

Data Fields
struct {
UINT32   PKG_TDP_LVL1:15
UINT32   Reserved1:1
UINT32   Config_TDP_LVL1_Ratio:8
UINT32   Reserved2:8
UINT32   PKG_MAX_PWR_LVL1:15
UINT32   PKG_MIN_PWR_LVL1:16
UINT32   Reserved3:1
}	Bits
UINT64	Uint64

Detailed Description

MSR information returned for MSR index MSR_HASWELL_CONFIG_TDP_LEVEL1

Field Documentation

struct { ... } MSR_HASWELL_CONFIG_TDP_LEVEL1_REGISTER::Bits

Individual bit fields

UINT32 MSR_HASWELL_CONFIG_TDP_LEVEL1_REGISTER::Config_TDP_LVL1_Ratio

[Bits 23:16] Config_TDP_LVL1_Ratio. ConfigTDP level 1 ratio to be used for this specific processor.

UINT32 MSR_HASWELL_CONFIG_TDP_LEVEL1_REGISTER::PKG_MAX_PWR_LVL1

[Bits 46:32] PKG_MAX_PWR_LVL1. Max Power setting allowed for ConfigTDP Level 1.

UINT32 MSR_HASWELL_CONFIG_TDP_LEVEL1_REGISTER::PKG_MIN_PWR_LVL1

[Bits 62:47] PKG_MIN_PWR_LVL1. MIN Power setting allowed for ConfigTDP Level 1.

UINT32 MSR_HASWELL_CONFIG_TDP_LEVEL1_REGISTER::PKG_TDP_LVL1

[Bits 14:0] PKG_TDP_LVL1. Power setting for ConfigTDP Level 1.

UINT32 MSR_HASWELL_CONFIG_TDP_LEVEL1_REGISTER::Reserved1

UINT32 MSR_HASWELL_CONFIG_TDP_LEVEL1_REGISTER::Reserved2

UINT32 MSR_HASWELL_CONFIG_TDP_LEVEL1_REGISTER::Reserved3

UINT64 MSR_HASWELL_CONFIG_TDP_LEVEL1_REGISTER::Uint64

All bit fields as a 64-bit value