IA32_CR0 Union Reference

Data Fields
struct {
UINT32   PE:1
	Protection Enable. More...
UINT32   MP:1
	Monitor Coprocessor. More...
UINT32   EM:1
	Emulation. More...
UINT32   TS:1
	Task Switched. More...
UINT32   ET:1
	Extension Type. More...
UINT32   NE:1
	Numeric Error. More...
UINT32   Reserved_0:10
	Reserved. More...
UINT32   WP:1
	Write Protect. More...
UINT32   Reserved_1:1
	Reserved. More...
UINT32   AM:1
	Alignment Mask. More...
UINT32   Reserved_2:10
	Reserved. More...
UINT32   NW:1
	Mot Write-through. More...
UINT32   CD:1
	Cache Disable. More...
UINT32   PG:1
	Paging. More...
}	Bits
UINTN	UintN

Detailed Description

Byte packed structure for Control Register 0 (CR0). 32-bits on IA-32. 64-bits on x64. The upper 32-bits on x64 are reserved.

Field Documentation

UINT32 IA32_CR0::AM

Alignment Mask.

struct { ... } IA32_CR0::Bits

UINT32 IA32_CR0::CD

Cache Disable.

UINT32 IA32_CR0::EM

Emulation.

UINT32 IA32_CR0::ET

Extension Type.

UINT32 IA32_CR0::MP

Monitor Coprocessor.

UINT32 IA32_CR0::NE

Numeric Error.

UINT32 IA32_CR0::NW

Mot Write-through.

UINT32 IA32_CR0::PE

Protection Enable.

UINT32 IA32_CR0::PG

Paging.

UINT32 IA32_CR0::Reserved_0

Reserved.

UINT32 IA32_CR0::Reserved_1

Reserved.

UINT32 IA32_CR0::Reserved_2

Reserved.

UINT32 IA32_CR0::TS

Task Switched.

UINTN IA32_CR0::UintN

UINT32 IA32_CR0::WP

Write Protect.