CPUID_INTEL_SGX_CAPABILITIES_0_SUB_LEAF_EAX Union Reference

Data Fields
struct {
UINT32   SGX1:1
UINT32   SGX2:1
UINT32   Reserved1:3
UINT32   ENCLV:1
UINT32   ENCLS:1
UINT32   Reserved2:25
}	Bits
UINT32	Uint32

Detailed Description

Sub-Leaf 0 Enumeration of Intel SGX Capabilities EAX for CPUID leaf CPUID_INTEL_SGX, sub-leaf CPUID_INTEL_SGX_CAPABILITIES_0_SUB_LEAF.

Field Documentation

struct { ... } CPUID_INTEL_SGX_CAPABILITIES_0_SUB_LEAF_EAX::Bits

Individual bit fields

UINT32 CPUID_INTEL_SGX_CAPABILITIES_0_SUB_LEAF_EAX::ENCLS

[Bit 6] If 1, indicates Intel SGX supports ENCLS instruction leaves ETRACKC, ERDINFO, ELDBC, and ELDUC.

UINT32 CPUID_INTEL_SGX_CAPABILITIES_0_SUB_LEAF_EAX::ENCLV

[Bit 5] If 1, indicates Intel SGX supports ENCLV instruction leaves EINCVIRTCHILD, EDECVIRTCHILD, and ESETCONTEXT.

UINT32 CPUID_INTEL_SGX_CAPABILITIES_0_SUB_LEAF_EAX::Reserved1

UINT32 CPUID_INTEL_SGX_CAPABILITIES_0_SUB_LEAF_EAX::Reserved2

UINT32 CPUID_INTEL_SGX_CAPABILITIES_0_SUB_LEAF_EAX::SGX1

[Bit 0] If 1, indicates leaf functions of SGX1 instruction are supported.

UINT32 CPUID_INTEL_SGX_CAPABILITIES_0_SUB_LEAF_EAX::SGX2

[Bit 1] If 1, indicates leaf functions of SGX2 instruction are supported.

UINT32 CPUID_INTEL_SGX_CAPABILITIES_0_SUB_LEAF_EAX::Uint32

All bit fields as a 32-bit value