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CPUID_DETERMINISTIC_ADDRESS_TRANSLATION_PARAMETERS_EDX Union Reference

Data Fields

struct {
   UINT32   TranslationCacheType:5
 
   UINT32   TranslationCacheLevel:3
 
   UINT32   FullyAssociative:1
 
   UINT32   Reserved1:5
 
   UINT32   MaximumNum:12
 
   UINT32   Reserved2:6
 
Bits
 
UINT32 Uint32
 

Detailed Description

CPUID Deterministic Address Translation Parameters EDX for CPUID leafs.

Field Documentation

struct { ... } CPUID_DETERMINISTIC_ADDRESS_TRANSLATION_PARAMETERS_EDX::Bits

Individual bit fields

UINT32 CPUID_DETERMINISTIC_ADDRESS_TRANSLATION_PARAMETERS_EDX::FullyAssociative

[Bits 8] Fully associative structure.

UINT32 CPUID_DETERMINISTIC_ADDRESS_TRANSLATION_PARAMETERS_EDX::MaximumNum

[Bits 25:14] Maximum number of addressable IDs for logical processors sharing this translation cache.

UINT32 CPUID_DETERMINISTIC_ADDRESS_TRANSLATION_PARAMETERS_EDX::Reserved1

[Bits 13:9] Reserved.

UINT32 CPUID_DETERMINISTIC_ADDRESS_TRANSLATION_PARAMETERS_EDX::Reserved2

[Bits 31:26] Reserved.

UINT32 CPUID_DETERMINISTIC_ADDRESS_TRANSLATION_PARAMETERS_EDX::TranslationCacheLevel

[Bits 7:5] Translation cache level (starts at 1).

UINT32 CPUID_DETERMINISTIC_ADDRESS_TRANSLATION_PARAMETERS_EDX::TranslationCacheType

[Bits 4:0] Translation cache type field.

UINT32 CPUID_DETERMINISTIC_ADDRESS_TRANSLATION_PARAMETERS_EDX::Uint32

All bit fields as a 32-bit value