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MdePkg[all]
1.08
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MdePkg[all]
1.08
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Data Structures | |
| struct | EFI_CPU_IO_PROTOCOL_ACCESS |
| struct | _EFI_CPU_IO2_PROTOCOL |
Macros | |
| #define | EFI_CPU_IO2_PROTOCOL_GUID |
Typedefs | |
| typedef struct _EFI_CPU_IO2_PROTOCOL | EFI_CPU_IO2_PROTOCOL |
| typedef EFI_STATUS(EFIAPI * | EFI_CPU_IO_PROTOCOL_IO_MEM )(IN EFI_CPU_IO2_PROTOCOL *This, IN EFI_CPU_IO_PROTOCOL_WIDTH Width, IN UINT64 Address, IN UINTN Count, IN OUT VOID *Buffer) |
Variables | |
| EFI_GUID | gEfiCpuIo2ProtocolGuid |
This files describes the CPU I/O 2 Protocol.
This protocol provides an I/O abstraction for a system processor. This protocol is used by a PCI root bridge I/O driver to perform memory-mapped I/O and I/O transactions. The I/O or memory primitives can be used by the consumer of the protocol to materialize bus-specific configuration cycles, such as the transitional configuration address and data ports for PCI. Only drivers that require direct access to the entire system should use this protocol.
Note: This is a boot-services only protocol and it may not be used by runtime drivers after ExitBootServices(). It is different from the Framework CPU I/O Protocol, which is a runtime protocol and can be used by runtime drivers after ExitBootServices().
Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent
| #define EFI_CPU_IO2_PROTOCOL_GUID |
| typedef struct _EFI_CPU_IO2_PROTOCOL EFI_CPU_IO2_PROTOCOL |
| typedef EFI_STATUS(EFIAPI * EFI_CPU_IO_PROTOCOL_IO_MEM)(IN EFI_CPU_IO2_PROTOCOL *This, IN EFI_CPU_IO_PROTOCOL_WIDTH Width, IN UINT64 Address, IN UINTN Count, IN OUT VOID *Buffer) |
Enables a driver to access registers in the PI CPU I/O space.
The Io.Read() and Io.Write() functions enable a driver to access PCI controller registers in the PI CPU I/O space.
The I/O operations are carried out exactly as requested. The caller is responsible for satisfying any alignment and I/O width restrictions that a PI System on a platform might require. For example on some platforms, width requests of EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will be handled by the driver.
If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32, or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for each of the Count operations that is performed.
If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16, EfiCpuIoWidthFifoUint32, or EfiCpuIoWidthFifoUint64, then only Buffer is incremented for each of the Count operations that is performed. The read or write operation is performed Count times on the same Address.
If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16, EfiCpuIoWidthFillUint32, or EfiCpuIoWidthFillUint64, then only Address is incremented for each of the Count operations that is performed. The read or write operation is performed Count times from the first element of Buffer.
| [in] | This | A pointer to the EFI_CPU_IO2_PROTOCOL instance. |
| [in] | Width | Signifies the width of the I/O or Memory operation. |
| [in] | Address | The base address of the I/O operation. |
| [in] | Count | The number of I/O operations to perform. The number of bytes moved is Width size * Count, starting at Address. |
| [in,out] | Buffer | For read operations, the destination buffer to store the results. For write operations, the source buffer from which to write data. |
| EFI_SUCCESS | The data was read from or written to the PI system. |
| EFI_INVALID_PARAMETER | Width is invalid for this PI system. |
| EFI_INVALID_PARAMETER | Buffer is NULL. |
| EFI_UNSUPPORTED | The Buffer is not aligned for the given Width. |
| EFI_UNSUPPORTED | The address range specified by Address, Width, and Count is not valid for this PI system. |
Enumeration that defines the width of the I/O operation.
| EFI_GUID gEfiCpuIo2ProtocolGuid |
1.8.6 
