Data Structures
union	IO_APIC_IDENTIFICATION_REGISTER

union	IO_APIC_VERSION_REGISTER

union	IO_APIC_REDIRECTION_TABLE_ENTRY

Macros
#define	IOAPIC_INDEX_OFFSET 0x00

#define	IOAPIC_DATA_OFFSET 0x10

#define	IO_APIC_IDENTIFICATION_REGISTER_INDEX 0x00

#define	IO_APIC_VERSION_REGISTER_INDEX 0x01

#define	IO_APIC_REDIRECTION_TABLE_ENTRY_INDEX 0x10

#define	IO_APIC_DELIVERY_MODE_FIXED 0

#define	IO_APIC_DELIVERY_MODE_LOWEST_PRIORITY 1

#define	IO_APIC_DELIVERY_MODE_SMI 2

#define	IO_APIC_DELIVERY_MODE_NMI 4

#define	IO_APIC_DELIVERY_MODE_INIT 5

#define	IO_APIC_DELIVERY_MODE_EXTINT 7

Detailed Description

I/O APIC Register Definitions from 82093AA I/O Advanced Programmable Interrupt Controller (IOAPIC), 1996.

Copyright (c) 2011 - 2018, Intel Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent

Macro Definition Documentation

#define IO_APIC_DELIVERY_MODE_EXTINT 7

#define IO_APIC_DELIVERY_MODE_FIXED 0

I/O APIC Interrupt Deliver Modes

#define IO_APIC_DELIVERY_MODE_INIT 5

#define IO_APIC_DELIVERY_MODE_LOWEST_PRIORITY 1

#define IO_APIC_DELIVERY_MODE_NMI 4

#define IO_APIC_DELIVERY_MODE_SMI 2

#define IO_APIC_IDENTIFICATION_REGISTER_INDEX 0x00

I/O APIC Indirect Register Indexes

#define IO_APIC_REDIRECTION_TABLE_ENTRY_INDEX 0x10

#define IO_APIC_VERSION_REGISTER_INDEX 0x01

#define IOAPIC_DATA_OFFSET 0x10

#define IOAPIC_INDEX_OFFSET 0x00

I/O APIC Register Offsets