Macros
#define	PCI_VENDOR_ID_VMWARE (0x15ad)

#define	PCI_DEVICE_ID_VMWARE_PVSCSI (0x07c0)

#define	PVSCSI_CDB_MAX_SIZE (16)

#define	PVSCSI_INTR_CMPL_0 BIT0

#define	PVSCSI_INTR_CMPL_1 BIT1

#define	PVSCSI_INTR_CMPL_MASK (PVSCSI_INTR_CMPL_0 \| PVSCSI_INTR_CMPL_1)

#define	PVSCSI_SETUP_RINGS_MAX_NUM_PAGES (32)

#define	PVSCSI_MAX_CMD_DATA_WORDS (sizeof (PVSCSI_CMD_DESC_SETUP_RINGS) / sizeof (UINT32))

#define	PVSCSI_SIMPLE_QUEUE_TAG (0x20)

#define	PVSCSI_FLAG_CMD_WITH_SG_LIST BIT0

#define	PVSCSI_FLAG_CMD_OUT_OF_BAND_CDB BIT1

#define	PVSCSI_FLAG_CMD_DIR_NONE BIT2

#define	PVSCSI_FLAG_CMD_DIR_TOHOST BIT3

#define	PVSCSI_FLAG_CMD_DIR_TODEVICE BIT4

Enumerations
enum	PVSCSI_BAR0_OFFSETS { PvScsiRegOffsetCommand = 0x0, PvScsiRegOffsetCommandData = 0x4, PvScsiRegOffsetCommandStatus = 0x8, PvScsiRegOffsetLastSts0 = 0x100, PvScsiRegOffsetLastSts1 = 0x104, PvScsiRegOffsetLastSts2 = 0x108, PvScsiRegOffsetLastSts3 = 0x10c, PvScsiRegOffsetIntrStatus = 0x100c, PvScsiRegOffsetIntrMask = 0x2010, PvScsiRegOffsetKickNonRwIo = 0x3014, PvScsiRegOffsetDebug = 0x3018, PvScsiRegOffsetKickRwIo = 0x4018 }

enum	PVSCSI_COMMANDS { PvScsiCmdFirst = 0, PvScsiCmdAdapterReset = 1, PvScsiCmdIssueScsi = 2, PvScsiCmdSetupRings = 3, PvScsiCmdResetBus = 4, PvScsiCmdResetDevice = 5, PvScsiCmdAbortCmd = 6, PvScsiCmdConfig = 7, PvScsiCmdSetupMsgRing = 8, PvScsiCmdDeviceUnplug = 9, PvScsiCmdLast = 10 }

enum	PVSCSI_HOST_BUS_ADAPTER_STATUS { PvScsiBtStatSuccess = 0x00, PvScsiBtStatLinkedCommandCompleted = 0x0a, PvScsiBtStatLinkedCommandCompletedWithFlag = 0x0b, PvScsiBtStatDataUnderrun = 0x0c, PvScsiBtStatSelTimeout = 0x11, PvScsiBtStatDatarun = 0x12, PvScsiBtStatBusFree = 0x13, PvScsiBtStatInvPhase = 0x14, PvScsiBtStatLunMismatch = 0x17, PvScsiBtStatSensFailed = 0x1b, PvScsiBtStatTagReject = 0x1c, PvScsiBtStatBadMsg = 0x1d, PvScsiBtStatHaHardware = 0x20, PvScsiBtStatNoResponse = 0x21, PvScsiBtStatSentRst = 0x22, PvScsiBtStatRecvRst = 0x23, PvScsiBtStatDisconnect = 0x24, PvScsiBtStatBusReset = 0x25, PvScsiBtStatAbortQueue = 0x26, PvScsiBtStatHaSoftware = 0x27, PvScsiBtStatHaTimeout = 0x30, PvScsiBtStatScsiParity = 0x34 }

Detailed Description

VMware PVSCSI Device specific type and macro definitions.

SPDX-License-Identifier: BSD-2-Clause-Patent

Macro Definition Documentation

#define PCI_DEVICE_ID_VMWARE_PVSCSI (0x07c0)

#define PCI_VENDOR_ID_VMWARE (0x15ad)

#define PVSCSI_CDB_MAX_SIZE (16)

#define PVSCSI_FLAG_CMD_DIR_NONE BIT2

#define PVSCSI_FLAG_CMD_DIR_TODEVICE BIT4

#define PVSCSI_FLAG_CMD_DIR_TOHOST BIT3

#define PVSCSI_FLAG_CMD_OUT_OF_BAND_CDB BIT1

#define PVSCSI_FLAG_CMD_WITH_SG_LIST BIT0

#define PVSCSI_INTR_CMPL_0 BIT0

#define PVSCSI_INTR_CMPL_1 BIT1

#define PVSCSI_INTR_CMPL_MASK (PVSCSI_INTR_CMPL_0 | PVSCSI_INTR_CMPL_1)

#define PVSCSI_MAX_CMD_DATA_WORDS (sizeof (PVSCSI_CMD_DESC_SETUP_RINGS) / sizeof (UINT32))

#define PVSCSI_SETUP_RINGS_MAX_NUM_PAGES (32)

#define PVSCSI_SIMPLE_QUEUE_TAG (0x20)

Enumerator
PvScsiRegOffsetCommand
PvScsiRegOffsetCommandData
PvScsiRegOffsetCommandStatus
PvScsiRegOffsetLastSts0
PvScsiRegOffsetLastSts1
PvScsiRegOffsetLastSts2
PvScsiRegOffsetLastSts3
PvScsiRegOffsetIntrStatus
PvScsiRegOffsetIntrMask
PvScsiRegOffsetKickNonRwIo
PvScsiRegOffsetDebug
PvScsiRegOffsetKickRwIo

Enumerator
PvScsiBtStatSuccess
PvScsiBtStatLinkedCommandCompleted
PvScsiBtStatLinkedCommandCompletedWithFlag
PvScsiBtStatDataUnderrun
PvScsiBtStatSelTimeout
PvScsiBtStatDatarun
PvScsiBtStatBusFree
PvScsiBtStatInvPhase
PvScsiBtStatLunMismatch
PvScsiBtStatSensFailed
PvScsiBtStatTagReject
PvScsiBtStatBadMsg
PvScsiBtStatHaHardware
PvScsiBtStatNoResponse
PvScsiBtStatSentRst
PvScsiBtStatRecvRst
PvScsiBtStatDisconnect
PvScsiBtStatBusReset
PvScsiBtStatAbortQueue
PvScsiBtStatHaSoftware
PvScsiBtStatHaTimeout
PvScsiBtStatScsiParity