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TpmPtp.h File Reference

Data Structures

struct  PTP_FIFO_REGISTERS
 
union  PTP_FIFO_INTERFACE_IDENTIFIER
 
union  PTP_FIFO_INTERFACE_CAPABILITY
 
struct  PTP_CRB_REGISTERS
 
union  PTP_CRB_INTERFACE_IDENTIFIER
 

Macros

#define INTERFACE_CAPABILITY_INTERFACE_VERSION_TIS_12   0x0
 
#define INTERFACE_CAPABILITY_INTERFACE_VERSION_TIS_13   0x2
 
#define INTERFACE_CAPABILITY_INTERFACE_VERSION_PTP   0x3
 
#define PTP_FIFO_VALID   BIT7
 
#define PTP_FIFO_ACC_ACTIVE   BIT5
 
#define PTP_FIFO_ACC_SEIZED   BIT4
 
#define PTP_FIFO_ACC_SEIZE   BIT3
 
#define PTP_FIFO_ACC_PENDIND   BIT2
 
#define PTP_FIFO_ACC_RQUUSE   BIT1
 
#define PTP_FIFO_ACC_ESTABLISH   BIT0
 
#define PTP_FIFO_STS_VALID   BIT7
 
#define PTP_FIFO_STS_READY   BIT6
 
#define PTP_FIFO_STS_GO   BIT5
 
#define PTP_FIFO_STS_DATA   BIT4
 
#define PTP_FIFO_STS_EXPECT   BIT3
 
#define PTP_FIFO_STS_SELFTEST_DONE   BIT2
 
#define PTP_FIFO_STS_RETRY   BIT1
 
#define PTP_FIFO_STS_EX_TPM_FAMILY   (BIT2 | BIT3)
 
#define PTP_FIFO_STS_EX_TPM_FAMILY_OFFSET   (2)
 
#define PTP_FIFO_STS_EX_TPM_FAMILY_TPM12   (0)
 
#define PTP_FIFO_STS_EX_TPM_FAMILY_TPM20   (BIT2)
 
#define PTP_FIFO_STS_EX_CANCEL   BIT0
 
#define PTP_INTERFACE_IDENTIFIER_INTERFACE_TYPE_FIFO   0x0
 
#define PTP_INTERFACE_IDENTIFIER_INTERFACE_TYPE_CRB   0x1
 
#define PTP_INTERFACE_IDENTIFIER_INTERFACE_TYPE_TIS   0xF
 
#define PTP_INTERFACE_IDENTIFIER_INTERFACE_VERSION_FIFO   0x0
 
#define PTP_INTERFACE_IDENTIFIER_INTERFACE_VERSION_CRB   0x1
 
#define PTP_INTERFACE_IDENTIFIER_INTERFACE_SELECTOR_FIFO   0x0
 
#define PTP_INTERFACE_IDENTIFIER_INTERFACE_SELECTOR_CRB   0x1
 
#define PTP_CRB_LOCALITY_STATE_TPM_REG_VALID_STATUS   BIT7
 
#define PTP_CRB_LOCALITY_STATE_ACTIVE_LOCALITY_MASK   (BIT2 | BIT3 | BIT4)
 
#define PTP_CRB_LOCALITY_STATE_ACTIVE_LOCALITY_0   (0)
 
#define PTP_CRB_LOCALITY_STATE_ACTIVE_LOCALITY_1   (BIT2)
 
#define PTP_CRB_LOCALITY_STATE_ACTIVE_LOCALITY_2   (BIT3)
 
#define PTP_CRB_LOCALITY_STATE_ACTIVE_LOCALITY_3   (BIT2 | BIT3)
 
#define PTP_CRB_LOCALITY_STATE_ACTIVE_LOCALITY_4   (BIT4)
 
#define PTP_CRB_LOCALITY_STATE_LOCALITY_ASSIGNED   BIT1
 
#define PTP_CRB_LOCALITY_STATE_TPM_ESTABLISHED   BIT0
 
#define PTP_CRB_LOCALITY_CONTROL_RESET_ESTABLISHMENT_BIT   BIT3
 
#define PTP_CRB_LOCALITY_CONTROL_SEIZE   BIT2
 
#define PTP_CRB_LOCALITY_CONTROL_RELINQUISH   BIT1
 
#define PTP_CRB_LOCALITY_CONTROL_REQUEST_ACCESS   BIT0
 
#define PTP_CRB_LOCALITY_STATUS_BEEN_SEIZED   BIT1
 
#define PTP_CRB_LOCALITY_STATUS_GRANTED   BIT0
 
#define PTP_CRB_CONTROL_AREA_REQUEST_GO_IDLE   BIT1
 
#define PTP_CRB_CONTROL_AREA_REQUEST_COMMAND_READY   BIT0
 
#define PTP_CRB_CONTROL_AREA_STATUS_TPM_IDLE   BIT1
 
#define PTP_CRB_CONTROL_AREA_STATUS_TPM_STATUS   BIT0
 
#define PTP_CRB_CONTROL_CANCEL   BIT0
 
#define PTP_CRB_CONTROL_START   BIT0
 
#define PTP_TIMEOUT_A   (750 * 1000)
 
#define PTP_TIMEOUT_B   (2000 * 1000)
 
#define PTP_TIMEOUT_C   (200 * 1000)
 
#define PTP_TIMEOUT_D   (30 * 1000)
 

Typedefs

typedef PTP_FIFO_REGISTERSPTP_FIFO_REGISTERS_PTR
 
typedef PTP_CRB_REGISTERSPTP_CRB_REGISTERS_PTR
 

Detailed Description

Platform TPM Profile Specification definition for TPM2.0. It covers both FIFO and CRB interface.

Copyright (c) 2016 - 2018, Intel Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent

Macro Definition Documentation

#define INTERFACE_CAPABILITY_INTERFACE_VERSION_PTP   0x3
#define INTERFACE_CAPABILITY_INTERFACE_VERSION_TIS_12   0x0

InterfaceVersion

#define INTERFACE_CAPABILITY_INTERFACE_VERSION_TIS_13   0x2
#define PTP_CRB_CONTROL_AREA_REQUEST_COMMAND_READY   BIT0

Used by Software to request the TPM transition to the Ready State. 1: Set to 1 by Software to indicate the TPM should be ready to receive a command. 0: Cleared to 0 by TPM to acknowledge the request. TPM SHALL complete this transition within TIMEOUT_C.

#define PTP_CRB_CONTROL_AREA_REQUEST_GO_IDLE   BIT1

Used by Software to indicate transition the TPM to and from the Idle state 1: Set by Software to indicate response has been read from the response buffer and TPM can transition to Idle 0: Cleared to 0 by TPM to acknowledge the request when TPM enters Idle state. TPM SHALL complete this transition within TIMEOUT_C.

#define PTP_CRB_CONTROL_AREA_STATUS_TPM_IDLE   BIT1

Used by TPM to indicate it is in the Idle State 1: Set by TPM when in the Idle State 0: Cleared by TPM on receipt of TPM_CRB_CTRL_REQ_x.cmdReady when TPM transitions to the Ready State. SHALL be cleared by TIMEOUT_C.

#define PTP_CRB_CONTROL_AREA_STATUS_TPM_STATUS   BIT0

Used by the TPM to indicate current status. 1: Set by TPM to indicate a FATAL Error 0: Indicates TPM is operational

#define PTP_CRB_CONTROL_CANCEL   BIT0

Used by software to cancel command processing Reads return correct value Writes (0000 0001h): Cancel a command Writes (0000 0000h): Clears field when command has been cancelled

#define PTP_CRB_CONTROL_START   BIT0

When set by software, indicates a command is ready for processing. Writes (0000 0001h): TPM transitions to Command Execution Writes (0000 0000h): TPM clears this field and transitions to Command Completion

#define PTP_CRB_LOCALITY_CONTROL_RELINQUISH   BIT1

Writes (1): The active Locality is done with the TPM.

#define PTP_CRB_LOCALITY_CONTROL_REQUEST_ACCESS   BIT0

Writes (1): Interrupt the TPM and generate a locality arbitration algorithm.

#define PTP_CRB_LOCALITY_CONTROL_RESET_ESTABLISHMENT_BIT   BIT3

Writes (1): Reset TPM_LOC_STATE_x.tpmEstablished bit if the write occurs from Locality 3 or 4.

#define PTP_CRB_LOCALITY_CONTROL_SEIZE   BIT2

Writes (1): The TPM gives control of the TPM to the locality setting this bit if it is the higher priority locality.

#define PTP_CRB_LOCALITY_STATE_ACTIVE_LOCALITY_0   (0)
#define PTP_CRB_LOCALITY_STATE_ACTIVE_LOCALITY_1   (BIT2)
#define PTP_CRB_LOCALITY_STATE_ACTIVE_LOCALITY_2   (BIT3)
#define PTP_CRB_LOCALITY_STATE_ACTIVE_LOCALITY_3   (BIT2 | BIT3)
#define PTP_CRB_LOCALITY_STATE_ACTIVE_LOCALITY_4   (BIT4)
#define PTP_CRB_LOCALITY_STATE_ACTIVE_LOCALITY_MASK   (BIT2 | BIT3 | BIT4)

000 - Locality 0 001 - Locality 1 010 - Locality 2 011 - Locality 3 100 - Locality 4

#define PTP_CRB_LOCALITY_STATE_LOCALITY_ASSIGNED   BIT1

A 0 indicates to the host that no locality is assigned. A 1 indicates a locality has been assigned.

#define PTP_CRB_LOCALITY_STATE_TPM_ESTABLISHED   BIT0

The TPM clears this bit to 0 upon receipt of _TPM_Hash_End The TPM sets this bit to a 1 when the TPM_LOC_CTRL_x.resetEstablishment field is set to 1.

#define PTP_CRB_LOCALITY_STATE_TPM_REG_VALID_STATUS   BIT7

This bit indicates whether all other bits of this register contain valid values, if it is a 1.

#define PTP_CRB_LOCALITY_STATUS_BEEN_SEIZED   BIT1

0: A higher locality has not initiated a Seize arbitration process. 1: A higher locality has Seized the TPM from this locality.

#define PTP_CRB_LOCALITY_STATUS_GRANTED   BIT0

0: Locality has not been granted to the TPM. 1: Locality has been granted access to the TPM

#define PTP_FIFO_ACC_ACTIVE   BIT5

Indicate that this locality is active.

#define PTP_FIFO_ACC_ESTABLISH   BIT0

A value of 1 indicates that a T/OS has not been established on the platform

#define PTP_FIFO_ACC_PENDIND   BIT2

When this bit is 1, another locality is requesting usage of the TPM.

#define PTP_FIFO_ACC_RQUUSE   BIT1

Set to 1 to indicate that this locality is requesting to use TPM.

#define PTP_FIFO_ACC_SEIZE   BIT3

Set to 1 to indicate that TPM MUST reset the TIS_PC_ACC_ACTIVE bit and remove ownership for localities less than the locality that is writing this bit.

#define PTP_FIFO_ACC_SEIZED   BIT4

Set to 1 to indicate that this locality had the TPM taken away while this locality had the TIS_PC_ACC_ACTIVE bit set.

#define PTP_FIFO_STS_DATA   BIT4

This bit indicates that the TPM has data available as a response.

#define PTP_FIFO_STS_EX_CANCEL   BIT0

A write of 1 after tpmGo and before dataAvail aborts the currently executing command, resulting in a response of TPM_RC_CANCELLED. A write of 1 after dataAvail and before tpmGo is ignored by the TPM.

#define PTP_FIFO_STS_EX_TPM_FAMILY   (BIT2 | BIT3)

TPM Family Identifier. 00: TPM 1.2 Family 01: TPM 2.0 Family

#define PTP_FIFO_STS_EX_TPM_FAMILY_OFFSET   (2)
#define PTP_FIFO_STS_EX_TPM_FAMILY_TPM12   (0)
#define PTP_FIFO_STS_EX_TPM_FAMILY_TPM20   (BIT2)
#define PTP_FIFO_STS_EXPECT   BIT3

The TPM sets this bit to a value of 1 when it expects another byte of data for a command.

#define PTP_FIFO_STS_GO   BIT5

Write a 1 to this bit to cause the TPM to execute that command.

#define PTP_FIFO_STS_READY   BIT6

When this bit is 1, TPM is in the Ready state, indicating it is ready to receive a new command.

#define PTP_FIFO_STS_RETRY   BIT1

Writes a 1 to this bit to force the TPM to re-send the response.

#define PTP_FIFO_STS_SELFTEST_DONE   BIT2

Indicates that the TPM has completed all self-test actions following a TPM_ContinueSelfTest command.

#define PTP_FIFO_STS_VALID   BIT7

This field indicates that STS_DATA and STS_EXPECT are valid

#define PTP_FIFO_VALID   BIT7

This bit is a 1 to indicate that the other bits in this register are valid.

#define PTP_INTERFACE_IDENTIFIER_INTERFACE_SELECTOR_CRB   0x1
#define PTP_INTERFACE_IDENTIFIER_INTERFACE_SELECTOR_FIFO   0x0

InterfaceSelector

#define PTP_INTERFACE_IDENTIFIER_INTERFACE_TYPE_CRB   0x1
#define PTP_INTERFACE_IDENTIFIER_INTERFACE_TYPE_FIFO   0x0

InterfaceType

#define PTP_INTERFACE_IDENTIFIER_INTERFACE_TYPE_TIS   0xF
#define PTP_INTERFACE_IDENTIFIER_INTERFACE_VERSION_CRB   0x1
#define PTP_INTERFACE_IDENTIFIER_INTERFACE_VERSION_FIFO   0x0

InterfaceVersion

#define PTP_TIMEOUT_A   (750 * 1000)
#define PTP_TIMEOUT_B   (2000 * 1000)
#define PTP_TIMEOUT_C   (200 * 1000)
#define PTP_TIMEOUT_D   (30 * 1000)

Typedef Documentation