ArmErrorSourceTable.h File Reference

Data Structures
struct	EFI_ACPI_ARM_ERROR_SOURCE_TABLE
struct	EFI_ACPI_AEST_NODE_STRUCT
struct	EFI_ACPI_AEST_INTERFACE_STRUCT
struct	EFI_ACPI_AEST_INTERRUPT_STRUCT
struct	EFI_ACPI_AEST_PROCESSOR_CACHE_RESOURCE_STRUCT
struct	EFI_ACPI_AEST_PROCESSOR_TLB_RESOURCE_STRUCT
struct	EFI_ACPI_AEST_PROCESSOR_GENERIC_RESOURCE_STRUCT
union	EFI_ACPI_AEST_PROCESSOR_RESOURCE
struct	EFI_ACPI_AEST_PROCESSOR_STRUCT
struct	EFI_ACPI_AEST_MEMORY_CONTROLLER_STRUCT
struct	EFI_ACPI_AEST_SMMU_STRUCT
struct	EFI_ACPI_AEST_VENDOR_DEFINED_STRUCT
struct	EFI_ACPI_AEST_GIC_STRUCT

Macros
#define	EFI_ACPI_6_3_ARM_ERROR_SOURCE_TABLE_SIGNATURE   SIGNATURE_32('A', 'E', 'S', 'T')
#define	EFI_ACPI_ARM_ERROR_SOURCE_TABLE_REVISION   1
#define	EFI_ACPI_AEST_NODE_TYPE_PROCESSOR   0x0
#define	EFI_ACPI_AEST_NODE_TYPE_MEMORY   0x1
#define	EFI_ACPI_AEST_NODE_TYPE_SMMU   0x2
#define	EFI_ACPI_AEST_NODE_TYPE_VENDOR_DEFINED   0x3
#define	EFI_ACPI_AEST_NODE_TYPE_GIC   0x4
#define	EFI_ACPI_AEST_INTERFACE_TYPE_SR   0x0
#define	EFI_ACPI_AEST_INTERFACE_TYPE_MMIO   0x1
#define	EFI_ACPI_AEST_INTERFACE_FLAG_PRIVATE   0
#define	EFI_ACPI_AEST_INTERFACE_FLAG_SHARED   BIT0
#define	EFI_ACPI_AEST_INTERFACE_FLAG_CLEAR_MISCX   BIT1
#define	EFI_ACPI_AEST_INTERRUPT_TYPE_FAULT_HANDLING   0x0
#define	EFI_ACPI_AEST_INTERRUPT_TYPE_ERROR_RECOVERY   0x1
#define	EFI_ACPI_AEST_INTERRUPT_FLAG_TRIGGER_TYPE_EDGE   0
#define	EFI_ACPI_AEST_INTERRUPT_FLAG_TRIGGER_TYPE_LEVEL   BIT0
#define	EFI_ACPI_AEST_PROCESSOR_RESOURCE_TYPE_CACHE   0x0
#define	EFI_ACPI_AEST_PROCESSOR_RESOURCE_TYPE_TLB   0x1
#define	EFI_ACPI_AEST_PROCESSOR_RESOURCE_TYPE_GENERIC   0x2
#define	EFI_ACPI_AEST_PROCESSOR_FLAG_GLOBAL   BIT0
#define	EFI_ACPI_AEST_PROCESSOR_FLAG_SHARED   BIT1
#define	EFI_ACPI_AEST_GIC_INTERFACE_TYPE_GICC   0x0
#define	EFI_ACPI_AEST_GIC_INTERFACE_TYPE_GICD   0x1
#define	EFI_ACPI_AEST_GIC_INTERFACE_TYPE_GICR   0x2
#define	EFI_ACPI_AEST_GIC_INTERFACE_TYPE_GITS   0x3

Detailed Description

Arm Error Source Table as described in the 'ACPI for the Armv8 RAS Extensions 1.1' Specification.

Copyright (c) 2020 Arm Limited. SPDX-License-Identifier: BSD-2-Clause-Patent

Reference(s):

• ACPI for the Armv8 RAS Extensions 1.1 Platform Design Document, dated 28 September 2020. (https://developer.arm.com/documentation/den0085/0101/)

Glossary

• Ref : Reference
• Id : Identifier

Macro Definition Documentation

#define EFI_ACPI_6_3_ARM_ERROR_SOURCE_TABLE_SIGNATURE   SIGNATURE_32('A', 'E', 'S', 'T')

"AEST" Arm Error Source Table

#define EFI_ACPI_AEST_GIC_INTERFACE_TYPE_GICC   0x0

#define EFI_ACPI_AEST_GIC_INTERFACE_TYPE_GICD   0x1

#define EFI_ACPI_AEST_GIC_INTERFACE_TYPE_GICR   0x2

#define EFI_ACPI_AEST_GIC_INTERFACE_TYPE_GITS   0x3

#define EFI_ACPI_AEST_INTERFACE_FLAG_CLEAR_MISCX   BIT1

#define EFI_ACPI_AEST_INTERFACE_FLAG_PRIVATE   0

#define EFI_ACPI_AEST_INTERFACE_FLAG_SHARED   BIT0

#define EFI_ACPI_AEST_INTERFACE_TYPE_MMIO   0x1

#define EFI_ACPI_AEST_INTERFACE_TYPE_SR   0x0

#define EFI_ACPI_AEST_INTERRUPT_FLAG_TRIGGER_TYPE_EDGE   0

#define EFI_ACPI_AEST_INTERRUPT_FLAG_TRIGGER_TYPE_LEVEL   BIT0

#define EFI_ACPI_AEST_INTERRUPT_TYPE_ERROR_RECOVERY   0x1

#define EFI_ACPI_AEST_INTERRUPT_TYPE_FAULT_HANDLING   0x0

#define EFI_ACPI_AEST_NODE_TYPE_GIC   0x4

#define EFI_ACPI_AEST_NODE_TYPE_MEMORY   0x1

#define EFI_ACPI_AEST_NODE_TYPE_PROCESSOR   0x0

#define EFI_ACPI_AEST_NODE_TYPE_SMMU   0x2

#define EFI_ACPI_AEST_NODE_TYPE_VENDOR_DEFINED   0x3

#define EFI_ACPI_AEST_PROCESSOR_FLAG_GLOBAL   BIT0

#define EFI_ACPI_AEST_PROCESSOR_FLAG_SHARED   BIT1

#define EFI_ACPI_AEST_PROCESSOR_RESOURCE_TYPE_CACHE   0x0

#define EFI_ACPI_AEST_PROCESSOR_RESOURCE_TYPE_GENERIC   0x2

#define EFI_ACPI_AEST_PROCESSOR_RESOURCE_TYPE_TLB   0x1

#define EFI_ACPI_ARM_ERROR_SOURCE_TABLE_REVISION   1