Data Fields
struct {
UINT32 Ctype1: 3
	Level 1 cache type. More...

UINT32 Ctype2: 3
	Level 2 cache type. More...

UINT32 Ctype3: 3
	Level 3 cache type. More...

UINT32 Ctype4: 3
	Level 4 cache type. More...

UINT32 Ctype5: 3
	Level 5 cache type. More...

UINT32 Ctype6: 3
	Level 6 cache type. More...

UINT32 Ctype7: 3
	Level 7 cache type. More...

UINT32 LoUIS: 3
	Level of Unification Inner Shareable. More...

UINT32 LoC: 3
	Level of Coherency. More...

UINT32 LoUU: 3
	Level of Unification Uniprocessor. More...

UINT32 Icb: 3
	Inner Cache Boundary. More...

}	Bits
	Bitfield definition of the register. More...

UINT32	Data
	The entire 32-bit value. More...

Detailed Description

Defines the structure of the CLIDR (Cache Level ID) register.

The lower 32 bits are the same for both AARCH32 and AARCH64 so we can use the same structure for both.

Field Documentation

struct { ... } CLIDR_DATA::Bits

Bitfield definition of the register.

UINT32 CLIDR_DATA::Ctype1

Level 1 cache type.

UINT32 CLIDR_DATA::Ctype2

Level 2 cache type.

UINT32 CLIDR_DATA::Ctype3

Level 3 cache type.

UINT32 CLIDR_DATA::Ctype4

Level 4 cache type.

UINT32 CLIDR_DATA::Ctype5

Level 5 cache type.

UINT32 CLIDR_DATA::Ctype6

Level 6 cache type.

UINT32 CLIDR_DATA::Ctype7

Level 7 cache type.

UINT32 CLIDR_DATA::Data

The entire 32-bit value.

UINT32 CLIDR_DATA::Icb

Inner Cache Boundary.

UINT32 CLIDR_DATA::LoC

Level of Coherency.

UINT32 CLIDR_DATA::LoUIS

Level of Unification Inner Shareable.

UINT32 CLIDR_DATA::LoUU

Level of Unification Uniprocessor.